MX26LV008B

Storage Temperature
Plastic Packages . . . . . . . . . . . . .   -65 to +150
Ambient Temperature
with Power Applied. . . . . . . . . . . . .-65 to +125
Voltage with Respect to Ground
VCC (Note 1) . . . . . . . . . . . . . . . . . -0.5 V to +4.0 V
A9, OE#, and
RESET# (Note 2) . . . . . . . . . . . . . . . -0.5 V to +12 V
All other pins (Note 1) . . . . . .  -0.5 V to VCC +0.5 V
Output Short Circuit Current (Note 3) . . . . . 200 mA

Notes:
1. Minimum DC voltage on input or I/O pins is -0.5 V. During voltage transitions, input or I/O pins may overshoot VSS to -2.0 V for periods of up to 20 ns. Maximum DC voltage on input or I/O pins is VCC +0.5 V.During voltage transitions, input or I/O pins may overshoot to VCC +2.0 V for periods up to 20 ns.
2. Minimum DC input voltage on pins A9, OE#, and RESET# is -0.5 V. During voltage transitions, A9, OE#,and RESET# may overshoot VSS to -2.0 V for periods of up to 20 ns. Maximum DC input voltage on pin A9 is +12V which may overshoot to 13.5V for periods up to 20 ns.
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.

The MX26LV008T/MX26LV008B is a 8-mega bit Flash memory organized as 1M bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write nonvolatile random access memory. The MX26LV008T/B is packaged in 40-pin TSOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.

The standard MX26LV008T/MX26LV008B offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX26LV008T/B has separate chip enable (CE#) and output enable (OE#) controls.

MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX26LV008T/MX26LV008B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility.

MXIC Flash technology reliably stores memory contents even after 2,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling.

The MX26LV008T/MX26LV008B uses a 3.0V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms.

The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.