MX25V8005

GENERAL
• Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
• 8,388,608 x 1 bit structure
• 256 Equal Sectors with 4K byte each
- Any Sector can be erased individually
• 16 Equal Blocks with 64K byte each
- Any Block can be erased individually
• Single Power Supply Operation
- 2.35 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 1.5V to 2.2V
PERFORMANCE
• High Performance
- Fast access time: 50MHz serial clock
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/block (64K-byte per
block)
• Low Power Consumption
- Low active read current: 8mA(max.) at 50MHz and 4mA(max.) at 25MHz
- Low active programming current: 15mA (max.)
- Low active erase current: 15mA (max.)
- Low standby current: 10uA (max.)
• Minimum 100,000 erase/program cycles
• 10 years data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Block Lock protection
- The BP0~BP2 status bit defines the size of the area to be software protected against Program and Erase instructions.
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first)
• Status Register Feature
• Electronic Identification
- JEDEC 2-byte Device ID
- RES command, 1-byte Device ID
HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• WP# pin
- Hardware write protection
• HOLD# pin
- pause the chip without diselecting the chip
• PACKAGE
- 8-pin SOP (150mil)
- 8-land WSON (6x5mm)
- All Pb-free devices are RoHS Compliant

Ambient Operating Temperature ..............-40 to 85
Storage Temperature............................. -55 to 125
Applied Input Voltage............................... -0.5V to 4.6V
Applied Output Voltage............................ -0.5V to 4.6V
VCC to Ground Potential.......................... -0.5V to 4.6V
Notes:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and functional operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
2. Specifications contained within the following tables are subject to change.
3. During voltage transitions, all pins may overshoot to 4.0V or -0.5V for period up to 20ns.
4. All input and output pins may overshoot to V_CC+0.5V while V_CC+0.5V is smaller than or equal to 4.6V.

The MX25V8005 is a CMOS 8,388,608 bit serial Flash memory, which is configured as 1,048,576 x 8 internally. The MX25V8005 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input.

The MX25V8005 provide sequential read operation on whole chip.After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or byte /sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase command is executes on chip or sector(4K-byte) or block(64K-byte).

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC current. The MX25V8005 utilize MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.