Features: • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs
• AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA- 0078.000 "Circuit Emulation Services Interoperability Specifications" (Nx64 Basic Service, DS1 Nx64 Service with CAS, and E1 Nx64 Service with CAS)
• Two UTOPIA ports (Level 2, 16-bit, 50 MHz) with loopback function for dual fibre ring applications
• Third UTOPIA port for connection to an external AAL5 SAR processor, or for chaining multiple MT90503 or other SAR or IMA devices
• Flexible aggregation capabilities (Nx64) to allow any combination of 64 Kbps
• TDM bus provides 32 bidirectional serial TDM streams at 2.048, 4.096, or 8.192 Mbps for up to 4096 TDM 64 Kbps channels
• Compatible with H.100 and H.110 interfaces• TDM to ATM transmission latency less than 250 s
• Support for clock recovery - Adaptive Clock
Recovery, Synchronous Residual Time Stamp (SRTS) or external
• Support master and slave TDM bus clock operation
• 8- or 16-bit microprocessor port, configurable to Motorola or Intel timing
• Master clock rate up to 80 MHz
• Single power supply device (3.3V)
• IEEE 1149 (JTAG) interface
Application• ATM Access and Multiplexing Equipment
• Switching Platforms that provide internetworking between TDM and ATM
• ATM Edge Switches
• ATM uplink for expansion of COs, PBXs, or open switching platforms using an adjunct ATM switch
• Integrated Digital Loop Carrier (IDLC)
• SONET or SDH Add and Drop Multiplexers (ADM)
• Next Generation Digital Loup Carrier (NGDIC)
• Digital Subscriber Line Access Multiplexer DSLAM with GatewaySpecifications
|
Parameter |
Symbol |
Min. |
Max. |
Units |
| 1 |
Supply Voltage 3.3 Volt Rail |
VDD |
-0.3 |
3.9 |
V |
| 2 |
Voltage on 3.3V Input pins |
VI |
-1.0 |
3.6 |
V |
| 3 |
Continuous current at digital inputs |
VI |
|
4.0 |
mA |
| 4 |
Continuous current at digital outputs |
IO |
|
5.3 |
mA |
| 6 |
Storage Temperature |
TS |
-40.0 |
+85.0 |
|
DescriptionThe MT90503 is an AAL1 SAR, which offers a highly integrated solution for interfacing telecom bus-based systems with ATM networks. The MT90503 has the capability of simultaneously processing 2048 bidirectional channels of 64 kbps. The MT90503 can be connected directly to an H.100 or H.110 compatible bus. The MT90503 also offers the capability of using Channel Associated Signalling (CAS) to support Circuit Emulation Service (CES) for Structured Data Transfer (SDT).
The interface to the TDM port of MT90503 is provided by a TDM bus, which consists of 32 bidirectional serial TDM data streams at 2.048, 4.096, or 8.192 Mbps, therefore allowing for 2048 bidirectional TDM channels operating at 64 kbps. This TDM bus is compatible with the ECTF H.100 and H.110 specifications.
The interface of MT90503 to the ATM domain is provided by three UTOPIA ports (Ports A, B, and C). All three of the UTOPIA ports can operate in ATM (master) or PHY (slave) mode. Port A can also be configured as Level 2 M-PHY mode.
MT90503 Data Sheet
