Features: • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces• Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces• Supports ITU-T G.812 Type IV clocks for 1,544 kbit/s interfaces and 2,048 kbit/s...
MT9045: Features: • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces• Supports ITU-T G.813 Option 1 clocks for 2048 kbit/...
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Parameter | Symbol | Min | Max | Units | |
1 | Supply voltage | VDD | -0.3 | 7.0 | V |
2 | Voltage on any pin | VPIN | -0.3 | VDD+0.3 | V |
3 | Current on any pin | IPIN | 30 | mA | |
4 | Storage temperature | TST | -55 | 125 | |
5 | 48 SSOP package power dissipation | PPD | 200 | mW |
The MT9045 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/OC3 links.
The MT9045 generates ST-BUS clock and framing signals that are phase locked to either a 19.44 MHz, 2.048MHz, 1.544MHz, or 8kHz input reference.
The MT9045 is compliant with AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced, and Stratum 4 and ETSI ETS 300 011; and ITU-T G.813 Option 1 for 2048 kbit/s interfaces. It will meet the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency and MTIE requirements for these specifications.