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MT90401AB

Features: • Meets requirements of GR-253-CORE for SONET Stratum 3 and SONET minimum clock• Meets requirements of GR-1244-CORE Stratum 3• Meets requirements of G.813 Option 1 and Option 2 for SDH Equipment Clocks (SEC) with external jitter attenuator• Provides OC-3/STM-1, DS...

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SeekIC No. : 004430173 Detail

MT90401AB: Features: • Meets requirements of GR-253-CORE for SONET Stratum 3 and SONET minimum clock• Meets requirements of GR-1244-CORE Stratum 3• Meets requirements of G.813 Option 1 and Op...

MT90401AB Data Sheet

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Part Number:
MT90401AB
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• Meets requirements of GR-253-CORE for SONET Stratum 3 and SONET minimum clock
• Meets requirements of GR-1244-CORE Stratum 3
• Meets requirements of G.813 Option 1 and Option 2 for SDH Equipment Clocks (SEC) with external jitter attenuator
• Provides OC-3/STM-1, DS3, E3, 19.44 MHz, DS2, E1, T1, 8 kHz and ST-BUS clock outputs
• Accepts reference inputs from two independent sources
• Selectable 1.544 MHz, 2.048 MHz, 19.44 MHz or 8kHz input reference frequencies
• Holdover accuracy of 0.02 ppm
• Adjustable output clock phase supporting masterslave arrangements
• Hardware or microprocessor control (8 bit microprocessor interface)
• 3.3 V supply
• JTAG boundary scan


Application

• SONET/SDH Add/Drop multiplexers
• SONET/SDH uplinks
• Integrated access devices
• ATM edge switches


Pinout

Connection Diagram


Specifications

  Parameter Symbol Min Max Units
1 Supply Voltage VDDR -0.3 7.0 V
2 Voltage on any pin VPIN -0.3 VDD+0.3 V
3 Current on any pin IPIN   30 mA
4 Storage temperature TST -55 125
5 80 LQFP package power dissipation PPD   1000 mW

* Voltages are with respect to ground (VSS) unless otherwise stated.
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.


Description

The MT90401AB is a digital phase locked loop (DPLL) that is designed to synchronize SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment. The MT90401AB is used to ensure that the timing of outgoing signals remains within the limits specified by Telcordia, ANSI and the ITU during normal operation and in the presence of disturbances on the incoming synchronization signals.




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