MT46H64M32L2KQ6IT

The MT46H64M32L2KQ6IT is designed as one kind of mobile double data rate (DDR) SDRAM that belongs to the MT46H64M32. Features of the MT46H64M32L2KQ6IT are:(1)?VDD = +1.8V ?.1V, VDDQ = +1.8V ?.1V; (2)?Bidirectional data strobe per byte of data (DQS); (3)Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle; (4)Differential clock inputs (CK and CK#); (5)Commands entered on each positive CK edge; (6)DQS edge-aligned with data for READs; centeraligned with data for WRITEs; (7)Four internal banks for concurrent operation; (8)Data masks (DM) for masking write data-one mask per byte; (9)Programmable burst lengths: 2, 4, 8, 16 or full page; (10)Concurrent auto precharge option is supported; (11)Auto refresh and self refresh modes; (12)1.8V LVCMOS compatible inputs; (13)On-chip temperature sensor to control refresh rate; (14)Partial array self refresh (PASR); (15)Deep power-down (DPD); (16)Selectable output drive (DS); (17)Clock stop capability.

If you want to know more information such as the electrical characteristics about the MT46H64M32L2KQ6IT, please download the datasheet in www.seekic.com or www.chinaicmart.com .