MT28F322P3

Features: • Flexible dual-bank architecture Support for true concurrent operation with zero latency Read bank a during program bank b and vice versaRead bank a during erase bank b and vice versa• Basic configuration: Seventy-one erasable blocks Bank a (8Mb for data storage) Bank b (24M...

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SeekIC No. : 004429691 Detail

MT28F322P3: Features: • Flexible dual-bank architecture Support for true concurrent operation with zero latency Read bank a during program bank b and vice versaRead bank a during erase bank b and vice ver...

floor Price/Ceiling Price

Part Number:
MT28F322P3
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• Flexible dual-bank architecture
    Support for true concurrent operation with zero latency
    Read bank a during program bank b and vice versa
    Read bank a during erase bank b and vice versa
• Basic configuration:
    Seventy-one erasable blocks
    Bank a (8Mb for data storage)
    Bank b (24Mb for program storage)
• VCC, VCCQ, VPP voltages
    2.7V (MIN), 3.3V (MAX) VCC
    2.2V (MIN), 3.3V (MAX) VCCQ
    3.0V (TYP) VPP (in-system PROGRAM/ERASE)
12V ±5% (HV) VPP tolerant (factory programming compatibility)
• Random access time: 70ns @ 2.7V VCC
• Page Mode read access
    Eight-word page
    Interpage read access: 70ns @ 2.7V
    Intrapage read access: 30ns @ 2.7V
• Low power consumption (VCC = 3.3V)
    Asynchronous/interpage READ < 15mA
    Intrapage READ < 7mA
    WRITE < 20mA (MAX)
    ERASE < 25mA (MAX)
    Standby < 15A (TYP), 50A (MAX) @ 3.3V
Automatic power save (APS) feature
• Enhanced write and erase suspend options
    ERASE-SUSPEND-to-READ within same bank
    PROGRAM-SUSPEND-to-READ within same bank
    ERASE-SUSPEND-to-PROGRAM within same bank
• Dual 64-bit chip protection registers for security purposes
• Cross-compatible command support Extended command set Common flash interface
• PROGRAM/ERASE cycle 100,000 WRITE/ERASE cycles per block
• Fast programming algorithm VPP = 12V ±5%



Specifications

Voltage to Any Ball Except VCC and VPP
    with Respect to VSS ........................... -0.5V to +4V
VPP Voltage (for BLOCK ERASE and PROGRAM
    with Respect to VSS) ................. -0.5V to +13.5V**
VCC and VCCQ Supply Voltage
    with Respect to VSS ........................... -0.3V to +4V
Output Short Circuit Current ............................100mA
Operating Temperature Range ............ -40 to +85
Storage Temperature Range ............. -55 to +125
Soldering Cycle .....................................260oC for 10s



Description

The MT28F322P3 is a high-performance, highdensity, nonvolatile memory solution that can significantly improve system performance. This new architecture features a two-memory-bank configuration that supports background operation with no latency.

A high-performance bus interface of MT28F322P3 allows a fast page mode data transfer; a conventional asynchronous bus interface is provided as well.

The MT28F322P3 allows soft protection for blocks, as read only, by configuring soft protection registers with dedicated command sequences. For security purposes, two 64-bit chip protection registers are provided.

The embedded WORD WRITE and BLOCK ERASE functions of MT28F322P3 are fully automated by an on-chip write state machine (WSM). Two on-chip status registers, one for each of the two memory partitions, can be used to monitor the WSM status and to determine the progress of the program/erase task.

The erase/program suspend functionality of MT28F322P3 allows compatibility with existing EEPROM emulation software packages.

The MT28F322P3 is manufactured using 0.18m process technology.




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