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MSM6636

Features: • Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued August 12, 1991)• CSMA/CD (Carrier-sense multiple access with collision detection)• Internal transmit buffer (1 frame) and receive buffer (2 frames)• Bit encoding: PWM (Pulse Width Modulatio...

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SeekIC No. : 004429002 Detail

MSM6636: Features: • Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued August 12, 1991)• CSMA/CD (Carrier-sense multiple access with collision detection)• Internal tra...

MSM6636 Data Sheet

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Part Number:
MSM6636
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued August 12, 1991)
• CSMA/CD (Carrier-sense multiple access with collision detection)
• Internal transmit buffer (1 frame) and receive buffer (2 frames)
• Bit encoding: PWM (Pulse Width Modulation)
• Transmission Speed: 41.6K bps
• Multi-address setting with physical addressing: 1 type / functional addressing: 15 types
• Address filter function by multi-addressing (broadcasting possible)
• Automatic retransmission function by arbitration loss and non ACK
• 3 types of in-frame response support:
   Single-byte response from a single recipient
    Multi-byte response from a single recipient (with CRC code)
   Single-byte response from multiple recipients (ID response as ACK)
• Error detection by cyclic redundancy check (CRC)
• Various communication error detections
• Dual-wire bus abnormality detection by internal bus receiver and fault tolerance function
• Host CPU interface is LSB first / serial, 4 modes supported
   Clock synchronous serial (no parity)
        Normal mode: 8-bit data
        MPC Mode: 8-bit data + MPC bit (1: address / 0: data select bit)
   UART (yes/no parity selectable)
        Normal mode: 1 start bit + 8-bit data + (parity) + 1 stop bit
        MPC mode: 1 start bit + 8-bit data + MPC bit + (parity) + 1 stop bit
• Sleep Function
    Low current consumption mode by oscillation stop (IDS Max < 50A)
    SLEEP / WAKE UP control from host CPU, WAKE UP via LAN bus
• Available package 18pin DIP, 18 pin QFJ (PLCC) and 24pin SOP.


Pinout

Connection Diagram


Specifications

Rating
Symbol
Condition
Rating
Unit
Power Supply Voltage
DVDD,AVDD
0.3 ~ +7.0
V
Input Voltage
VI
AVDD = DVDD
-0.3~DVDD+0.3
V
Power Dissipation
VO
AVDD = DVDD
-0.3~DVDD+0.3
V
Power Dissipation
PD(DIP)*1
Ta = 25°C
860
mw
PD(QFJ)*2
Ta = 25°C
960
mW
PD(SOP)*3
Ta = 25°C
830
mW
Storage Temperature
TSTG
55 to +150
°C
PD(DIP)*1: 18PIN DIP package power dissipation
PD(QFJ)*2: 18PIN QFJ package power dissipation
PD(SOP)*3: 24PIN SOP package power dissipation


Description

The MSM6636 is a transmission controller for automotive LAN based on data communication protocol SAE-J1850. This LSI can realize a data bus topology bus LAN system with a PWM bit encoding method (41.6 K bps). In addition to a protocol control circuit, MSM6636 has an enclosed quartz oscillation circuit, host CPU interface (clock synchronous serial / UART), a transmit/receive buffer, and a bus receiver circuit that decreases the burden on the host CPU.




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