MRFIC1502

ApplicationDesign PhilosophyThe MRFIC1502 design is a standard dual downconversion configuration with an integrated fixed frequency phase locked loop to generate the two local oscillators and the buffer to generate the sampling clock for a digital correlator and decimator. The active device for th...

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SeekIC No. : 004427127 Detail

MRFIC1502: ApplicationDesign PhilosophyThe MRFIC1502 design is a standard dual downconversion configuration with an integrated fixed frequency phase locked loop to generate the two local oscillators and the bu...

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Part Number:
MRFIC1502
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Application

Design PhilosophyThe MRFIC1502 design is a standard dual downconversion configuration with an integrated fixed frequency phase locked loop to generate the two local oscillators and the buffer to generate the sampling clock for a digital correlator and decimator. The active device for the Lband VCO is also integrated on the chip. This chip is designed in the third generation of Motorola's Oxide Self Aligned Integrated Circuits (MOSAIC 3) silicon bipolar process.


Pinout

  Connection Diagram


Description

This MRFIC1502 integrated circuit is intended for GPS receiver applications. The dual conversion design is implemented in Motorola's lowcost high performance MOSAIC 3 silicon bipolar process and is packaged in a lowcost surface mount TQFP48 package. In addition to the mixers, a VCO, a PLL and a loop filter are integrated onchip. Output IF is nominally 9.5 MHz.
MRFIC1502 features

• 65 dB Minimum Conversion Gain
• 5 Volts Operation
• 50 mA Typical Current Consumption
• LowCost, Low Profile Plastic TQFP Package
• Device Marking = M1502




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