Application• 4-V gate drivability• Small package by full molding (SIP 12 pins)• High drain power dissipation (6-device operation) : PT = 36 W (Tc = 25 )• Low drain-source ON resistance: RDS (ON) = 120 m (typ.) (Nch) 160 m (typ.) (Pch) • High forward transfer admittanc...
MP6404: Application• 4-V gate drivability• Small package by full molding (SIP 12 pins)• High drain power dissipation (6-device operation) : PT = 36 W (Tc = 25 )• Low drain-source ON ...
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Supervisory Circuits Low Quiescent Prog Delay Spv Circuit
Characteristics |
Symbol |
Rating |
Unit | ||
Nch |
Pch | ||||
Drain-source voltage |
VDSS |
60 |
-60 |
V | |
Drain-gate voltage (RGS = 20 k) |
VDGR |
60 |
-60 |
V | |
Gate-source voltage |
VGSS |
±20 |
±20 |
V | |
Drain current | DC |
ID |
5 |
-5 |
A |
Pulse |
IDP |
20 |
-20 | ||
Drain power dissipation (1-device operation, Ta = 25 ) |
PD |
2.2 |
W | ||
Drain power dissipation (6-device operation) |
Ta = 25 |
PDT |
4.4 |
W | |
Tc = 25 |
36 | ||||
Single pulse avalanche energy (Note 1) |
EAS |
129 |
273 |
mJ | |
Avalanche current |
IAR |
5 |
-5 |
A | |
Repetitive avalanche energy (Note 2) |
1 device operation |
EAR |
0.22 |
mJ | |
6 device operation |
EART |
0.44 | |||
Channel temperature |
Tch |
150 |
| ||
Storage temperature range |
Tstg |
−55 to 150 |
|
Note 1:
Condition for avalanche energy (single pulse) Nch: VDD = 25 V, starting Tch = 25 , L = 7 mH, RG = 25 , IAR = 5 A Pch: VDD = −25 V, starting Tch = 25 , L = 14.84 mH, RG = 25 , IAR = −5 A
Note 2: Repetitive rating; pulse width limited by maximum channel temperature This transistor is an electrostatic-sensitive device. Please handle with caution.