Features: - LOW power Schottky version of 2502- Storage and control for successive approximation A to D conversion- Performs serial - to - parallel conversionSpecificationsStorage Temperature ........................-65 to +150Ambient Temperature under Bias.......-55 to +125Input Voltage...........
MNDM54LS502-X: Features: - LOW power Schottky version of 2502- Storage and control for successive approximation A to D conversion- Performs serial - to - parallel conversionSpecificationsStorage Temperature .........
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Specifications Storage Temperature -65 to +150 Ambient Temperature under Bias -55 to ...
Storage Temperature ........................-65 to +150
Ambient Temperature under Bias.......-55 to +125
Input Voltage......................................-0.5V to +10.0V
VCC Pin Potential to Ground Pin............-0.5V to +7.0V
Junction Temperature under Bias........-55 to +175
Current Applied to Output in LOW state (Max)...twice the rated Iol (ma)
Note 1: Absolute Maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
The LS502 is an 8-bit register with the interchange logic necessary to perform serial-to-parallel conversion and provide an active LOW Conversion Complete (CC) signal coincident with storage of the eighth bit. An active LOW Start (S) input performs synchronous initialization which forces Q7 LOW and all others HIGH. Subsequent clocks shift Q7 LOW signal downstream which simultaneously backfills the register such that the first serial data (D input) bit is stored in Q7, the second bit in Q6, the third in Q5,etc. The serial input data is also synchronized by an auxilliary flip-flop and brought out on QD.
Designed primarily for use in the successive approximate technique for analog-to-digital conversion, the LS502 can also be used as a serial-to-parallel conversion ring counter and as the storage and control element in recursive digital routines.