Features: ·Low power supply voltage: VDD=1.0 to 1.4V·Low power consumption: 0.5mW (VDD=V1.03V, FIN=60MHz)·High-speed operation: FIN=60MHz (VDD=1.03V)·Frequency dividing ratios in reference frequency dividing stage: 5 to 131,071·Frequency dividing ratios in comparator stage: 272 to 262,143·Lock det...
MN6153UC: Features: ·Low power supply voltage: VDD=1.0 to 1.4V·Low power consumption: 0.5mW (VDD=V1.03V, FIN=60MHz)·High-speed operation: FIN=60MHz (VDD=1.03V)·Frequency dividing ratios in reference frequency...
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The MN6153UC is a CMOS LSI for a phase-locked loop (PLL) frequency synthesizer with serial data input.
MN6153UC consists of a two-coefficient prescaler, variable frequency divider, phase comparator, and charge pump. It offers high-speed operation on a low power supply voltage (1.0 to 1.4 V) and low power consumption (0.5 mW for VDD=1.03 V, FIN= 60 MHz).
Other features of MN6153UC include intermittent operation by the power save (PS) control signal and high-speed pull-in that rapidly corrects the phase differences occurring at the start of operation.