MN54ABT646-X

Features: · Independent registers for A and B buses.· Multiplexed real·time and stored data.· A and B output sink capability of 48 mA, source capability of 24 mA· Guaranteed latchup protection· High impedance glitch free bus loading during entire power up and power down cycle.· Non-Destructive hot...

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SeekIC No. : 004424631 Detail

MN54ABT646-X: Features: · Independent registers for A and B buses.· Multiplexed real·time and stored data.· A and B output sink capability of 48 mA, source capability of 24 mA· Guaranteed latchup protection· High...

floor Price/Ceiling Price

Part Number:
MN54ABT646-X
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/22

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Product Details

Description



Features:

· Independent registers for A and B buses.
· Multiplexed real·time and stored data.
· A and B output sink capability of 48 mA, source capability of 24 mA
· Guaranteed latchup protection
· High impedance glitch free bus loading during entire power up and power down cycle.
· Non-Destructive hot insertion capability.
· SMD : 5962-9457701Q3A*, QLA**, QKA***



Specifications

Vcc Pin Potential to Ground Potential ......-0.5V to +7.0V
Input Voltage (Note 2).............................-0.5V to +7.0V
Input Current (Note 2) .......................-30mA to +5.0mA
Voltage Applied To Any Output
In the Disabled or Power-Off State...........-0.5V to 5.5V
In The High State .......................................-0.5V to Vcc
Current Applied To Output
In The Low State (Max)....................................... 96mA
Junction Temperature (Tj) Ceramic ....................+175
Thermal Resistance
Junction-To-Case (Theta JC)................See Mil-Std 1835
Storage Temperature ...........................-65 to +150
Lead Temperature (Soldering, 10 seconds) .......+300
ESD Classification.............................................. Class 3
Maximum Power Dissipation..............................500 mW
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.



Description

The MN54ABT646-X consists of bus tranceiver circuits wit TRI-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control OE and direction pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls of MN54ABT646-X can mutiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control OE is Active LOW. In the isolation mode (control OE HIGH), A data may be stored in the B register and/or B data may be stored in the A register.




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