MN101E31G

The MN101E31G is an excellent IC. The internal ROM type is mask ROM.

There is some information about the specifications of MN101E31G: (1)ROM (byte): 128 K; (2)RAM (byte): 4 K; (3)package: LQFP080-P-1414A (under development); (4)minimum instruction execution time: 50 ns (at 2.2 V to 5.5 V, 20 MHz); (5)DMA controller: 1 systems (external request/internal event request/software request maximum transfer cycles are 255); (6)A/D converter: 10-bit*12-ch; (7)serial interface: serial 0-3: UART (full duplex)/synchronous*1; serial 4: multi master I²C/synchronous*1; serial 5: I²C slave*1; (8)display control function: LCD and 55 segments*4 commons (static, 1/2, 1/3, 1/4 duty) 1/3 bias, usable if VLC1 VDD; (9)special ports: buzzer output, remote control carrier signal output, high-current drive port; (10)ROM correction: correcting address designation: up to 7 addresses possible.

The following is about the MN101E31G timer counter: (1)timer counter 0: 8-bit*1 (timer pulse output, event count, added pulse (2-bit) system PWM output, generation of remote control carrier, simple; (2)pulse measurement, real time output control); (3)timer counter 1: 8-bit*1 (timer pulse output, event count, 16-bit cascade connected (timer 0, 1) timer synchronous output event); (4)timer counter 2: 8-bit*1 (timer pulse output, event count, added pulse (2-bit) system PWM output, simple pulse measurement, 24-bit cascade connected (timer 0, 1, 2), timer synchronous output event, real timer output control); (5)timer counter 3: 8-bit*1 (timer pulse output, event count, generation of remote control carrier, 16-bit cascade connected (timer 2, 3), 32-bit cascade connected (timer 0, 1, 2, 3)); (6)timer counter 4: 8-bit*1 (timer pulse output, added pulse (2-bit) system PWM output, event count, serial transfer clock, simple pulse measurement); (7)timer counter 6: 8-bit free run timer, time base timer; (8)timer counter 7: 16-bit*1 (timer pulse output, event count, high accuracy PWM, high performance IGBT output (cycle/duty continuous variable) timer synchronous output event, input capture (Both edge available), real timer output control), double buffer compare register; (9)timer counter 8: 16-bit*1 (timer pulse output, event count, High accuracy PWM output (cycle/duty continuous variable) pulse width measurement, input capture (Both edge available), 32-bit cascade connected (Timer 7, 8), 32-bitPWM output, synchronous output; (10)event), double buffer compare register; (11)timer counter A: 8-bit*1 (event count, serial transfer clock timer, clock for function (timer, serial, LCD)); (12)watchdog timer.