Features: ` Stack of eight 256Mbit SDRam.` Organized as 128Mx16-bit.` Single +3.3V ±0.3V power supply.` Fully synchronous ; all signals registered on positive edge ofsystem clock.`Internal pipelined operation ; column adress can be changedevery clock cycle.`Programmable burst lengths ; 1, 2, 4, 8 ...
MMSD16128808S-V: Features: ` Stack of eight 256Mbit SDRam.` Organized as 128Mx16-bit.` Single +3.3V ±0.3V power supply.` Fully synchronous ; all signals registered on positive edge ofsystem clock.`Internal pipelined...
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` Stack of eight 256Mbit SDRam.
` Organized as 128Mx16-bit.
` Single +3.3V ±0.3V power supply.
` Fully synchronous ; all signals registered on positive edge of system clock.
` Internal pipelined operation ; column adress can be changed every clock cycle.
` Programmable burst lengths ; 1, 2, 4, 8 or full page.
` Auto Precharge, includes Concurrent Auto Precharge, and Auto Refresh Modes.
` Self Refresh Modes.
` LVTTL-compatible inputs and outputs.
` Available Temperature Range :
0to +70
-40 to +85
` Available with screening option for high reliability application (Space, etc...).
Parameter |
Symbol |
Value |
Unit |
Voltage on any pin relative to VSS |
VIN, VOUT |
-1.0 ~ 4.6 |
V |
Storage temperature |
TSTG |
-55 ~ +150 |
|
Power dissipation |
PD |
2 |
W |
V Short circuit current |
LOS |
50 |
mA |
The MMSD16128808S-V is a high-speed highly integrated Synchronous Dynamic Random Access Memory containing 2,147,483,648 bits.
It is organized with four banks of 512 Mbit.
Each bank has a 16-bit interface and is selected with specific #CS CLK and CKE.
MMSD16128808S-V is particularly well suited for use in high reliability, high performance and high density system applications, such as solid state mass recorder, server or workstation.
The MMSD16128808S-V is packaged in a 58 pin SOP.