MM74HCT640

Features: TTL input compatible Octal TRI-STATE outputs for mP bus applications: 6 mA, typical High speed: 16 ns typical propagation delay Low power: 80 mA maximum (74HCT)Specifications Supply Voltage (VCC)DC Input Voltage (VIN)DC Output Voltage (VOUT)Clamp Diode Current (IIK, IOK)DC Output...

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SeekIC No. : 004423155 Detail

MM74HCT640: Features: TTL input compatible Octal TRI-STATE outputs for mP bus applications: 6 mA, typical High speed: 16 ns typical propagation delay Low power: 80 mA maximum (74HCT)Specifications Suppl...

floor Price/Ceiling Price

Part Number:
MM74HCT640
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

TTL input compatible
Octal TRI-STATE outputs for mP bus applications: 6 mA, typical
High speed: 16 ns typical propagation delay
Low power: 80 mA maximum (74HCT)



Specifications

Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
DC Output Current, per pin (IOUT)
DC VCC or GND Current, per pin (ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S.O. Package only
Lead Temp. (TL) (Soldering 10 seconds)
-0.5 to +7.0V
-1.5 to VCC+1.5V
-0.5 to VCC+0.5V
±20 mA
±25 mA
±50 mA
-65oC to +150oC

600 mW
500 mW
260oC



Description

These TRI-STATE bi-directional transceivers MM74HCT640 utilize advanced silicon-gate CMOS technology and are intended for two-way asynchronous communication between data buses. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits MM74HCT640 possess the low power consumption of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits.

MM74HCT640 are TTL input compatible and can drive up to 15 LS-TTL loads, and all inputs are protected from damage due to static discharge by diodes to VCC and ground.

Both the MM54HCT640/MM74HCT640 and the MM54HCT643/ MM74HCT643 have one active low enable input (G), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A. The MM54HCT640/MM74HCT640 transfers inverted data from one bus to the other. The MM54HCT643/MM74HCT643 transfers inverted data from the A bus to the B bus and non-inverted data from the B bus to the A bus.

MM54HCT/MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LSTTL devices and can be used to reduce power consumption in existing designs.




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