Features: ` Typical propagation delay: 20 ns` Low quiescent current: 40 A maximum (74HCT Series)` Low input current: 1 A maximum` Fanout of 10 LS-TTL loads` TTL input compatibleSpecificationsSupply Voltage (VCC) ......... ...−0.5 to +7.0VDC Input Voltage (VIN) ....... ..−1.5 to VCC +1....
MM74HCT164: Features: ` Typical propagation delay: 20 ns` Low quiescent current: 40 A maximum (74HCT Series)` Low input current: 1 A maximum` Fanout of 10 LS-TTL loads` TTL input compatibleSpecificationsSupply ...
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` Typical propagation delay: 20 ns
` Low quiescent current: 40 A maximum (74HCT Series)
` Low input current: 1 A maximum
` Fanout of 10 LS-TTL loads
` TTL input compatible
Supply Voltage (VCC) ......... ...−0.5 to +7.0V
DC Input Voltage (VIN) ....... ..−1.5 to VCC +1.5V
DC Output Voltage (VOUT)..... .. −0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)....... ... ±20 mA
DC Output Current, per pin (IOUT)... .... . ±25 mA
DC VCC or GND Current, per pin (ICC)....... ±50 mA
Storage Temperature Range (TSTG) ..−65°C to +150°C
Power Dissipation (PD)
(Note 3) .....................600 mW
S.O. Package Only ................500 mW
Lead Temperature (TL)
(Soldering 10 seconds).............. 260°C
The MM74HCT164 utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low consumption of standard CMOS integrated circuits. It also offers speeds comparable to low power Schottky devices. This 8-bit shift register has gated serial inputs and CLEAR. Each register bit of MM74HCT164 is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A LOW at either or both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A high level on one input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs of MM74HCT164 may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse. Clear is independent of the clock and accomplished by a low level at the CLEAR input. The MM74HCT164 is functionally as well as pin-out compatible with the standard 74LS logic family. All inputsare protected from damage due to static discharge by internal diode clamps to VCC and ground.
MM74HCT164 are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.