MM74HC4514

  The MM74HC4514 utilizes advanced silicon-gate CMOS technology, which is well suited to memory address decod-ing or data routing application. It possesses high noise immunity and low power dissipation usually associated with CMOS circuitry, yet speeds comparable to low power Schottky TTL circuits. It can drive up to 10 LS-TTL loads.

  The MM74HC4514 contain a 4-to-16 line decoder and a 4-bit latch. The latch can store the data on the select inputs,thus allowing a selected output to remain HIGH even though the select data has changed. When the LATCH ENABLE input to the latches is HIGH the outputs will change with the inputs. When LATCH ENABLE goes LOW the data on the select inputs is stored in the latches. The four select inputs determine which output will go HIGH pro-vided the INHIBIT input is LOW. If the INHIBIT input of MM74HC4514 is HIGH all outputs are held LOW thus disabling the decoder.

  The MM74HC4514 is functionally and pinout equivalent to he CD4514BC and the MC1451BC. All inputs are pro-ected against damage due to static discharge diodes from V_CC and ground.