MM74HC373

Features: ` Typical propagation delay: 18 ns` Wide operating voltage range: 2 to 6 volts` Low input current: 1 A maximum` Low quiescent current: 80 A maximum (74 Series)` Output drive capability: 15 LS-TTL loadsSpecificationsSupply Voltage (VCC) -0.5 to +7.0VDC Input Voltage (VIN) -1.5 to VCC +1....

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SeekIC No. : 004423089 Detail

MM74HC373: Features: ` Typical propagation delay: 18 ns` Wide operating voltage range: 2 to 6 volts` Low input current: 1 A maximum` Low quiescent current: 80 A maximum (74 Series)` Output drive capability: 15...

floor Price/Ceiling Price

Part Number:
MM74HC373
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

` Typical propagation delay: 18 ns
` Wide operating voltage range: 2 to 6 volts
` Low input current: 1 A maximum
` Low quiescent current: 80 A maximum (74 Series)
` Output drive capability: 15 LS-TTL loads




Specifications

Supply Voltage (VCC)                            -0.5 to +7.0V
DC Input Voltage (VIN)                         -1.5 to VCC +1.5V
DC Output Voltage (VOUT)                    -0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)              ±20 mA
DC Output Current, per pin (IOUT)         ±35 mA
DC VCC or GND Current, per pin (ICC)   ±70 mA
Storage Temperature Range (TSTG)       -65 to +150
Power Dissipation (PD)
(Note 3)                                                600 mW
S.O. Package only                                 500 mW
Lead Temperature (TL)
(Soldering 10 seconds)                         260



Description

The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these MM74HC373 are ideally suited for interfacing with bus lines in a bus organized system.

When the LATCH ENABLE input of MM74HC373 is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a high logic level is applied to the OUTPUT CONTROL input, all outputs of MM74HC373 go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

The MM74HC373 is speed, function, and pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.




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