MM74HC164

Supply Voltage (V_CC)                           −0.5 to +7.0V
DC Input Voltage (V_IN)                  −1.5 to V_CC +1.5V
DC Output Voltage (V_OUT)             −0.5 to V_CC +0.5V
Clamp Diode Current (I_IK, I_OK)                       ±20 mA
DC Output Current, per pin (I_OUT)                  ±25 mA
DC VCC or GND Current, per pin (I_CC)             ±50 mA
Storage Temperature Range (T_STG)    −65 to +150
Power Dissipation (PD)
(Note 3)                                                           600 mW
S.O. Package only                                           500 mW
Lead Temperature (T_L)
(Soldering 10 seconds)                                       260

The MM74HC164 utilizes advanced silicon-gate CMOStechnology. It has the high noise immunity and low con-sumption of standard CMOS integrated circuits. It also offers speeds comparable to low power Schottky devices.This 8-bit shift register of MM74HC164 has gated serial inputs and CLEAR.Each register bit is a D-type master/slave flip-flop. Inputs A& B permit complete control over the incoming data. ALOW at either or both inputs inhibits entry of new data andresets the first flip-flop to the low level at the next clockpulse. A high level on one input of MM74HC164 enables the other inputwhich will then determine the state of the first flip-flop. Dataat the serial inputs may be changed while the clock is HIGHor LOW, but only information meeting the setup and holdtime requirements will be entered. Data is serially shifted inand out of the 8-bit register during the positive going transi-tion of the clock pulse. Clear is independent of the clockand accomplished by a low level at the CLEAR input.

The MM74HC164 is functionally as well as pin-outcompatible with the standard 74LS logic family. All inputsare protected from damage due to static discharge by inter-nal diode clamps to V  and ground.