MM74C932

The MM74C932/MM54C932 consists of two independent output phase comparator circuits. The two phase comparators have a common signal input and a common comparator input. The signal input of MM74C932 can be directly coupled for a large voltage signal, or capacitively coupled to the self-biasing amplifier at the signal input for a small voltage signal.

Phase comparator I, an exclusive-OR gate  of MM74C932, provides a digital error signal (phase comp. I out) and maintains 90⁰ phase shifts at the VCO center frequency. Between signal input  and comparator input (both at 50% duty cycle), it may lockonto the signal input frequencies that are close to harmonics of the VCO center frequency.

Phase comparator II of MM74C932 is an edge-controlled digital memory network. It provides a digital error signal (phase comp. II out) and lock in signal (phase pulses) to indicate a locked condition and maintains a 0⁰ phase shift between signal input and comparator input.