MM74C89

Features: · Wide supply voltage range: 3.0V to 15V· Guaranteed noise margin: 1.0V· High noise immunity: 0.45 VCC (typ.)· Low power TTL compatibility: fan out of 2 driving 74L· Low power consumption: 100 nW/package (typ.)· Fast access time: 130 ns (typ.) at VCC = 10V· 3-STATE outputPinoutSpecificat...

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MM74C89 Picture
SeekIC No. : 004423016 Detail

MM74C89: Features: · Wide supply voltage range: 3.0V to 15V· Guaranteed noise margin: 1.0V· High noise immunity: 0.45 VCC (typ.)· Low power TTL compatibility: fan out of 2 driving 74L· Low power consumption:...

floor Price/Ceiling Price

Part Number:
MM74C89
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

· Wide supply voltage range: 3.0V to 15V
· Guaranteed noise margin: 1.0V
· High noise immunity: 0.45 VCC (typ.)
· Low power TTL compatibility: fan out of 2 driving 74L
· Low power consumption: 100 nW/package (typ.)
· Fast access time: 130 ns (typ.) at VCC = 10V
· 3-STATE output




Pinout

  Connection Diagram


Specifications

Voltage at Any Pin

-0.3V to VCC + 0.3V

Operating Temperature Range

-40 to +85

Storage Temperature Range (TS)

-65 to +150

Power Dissipation (PD)  
Dual-In-Line

700 mW

Small Outline

500 mW

Operating VCC Range

3.0V to 15V

Absolute Maximum VCC

18V

Lead Temperature (TL)  
(Soldering, 10 seconds)

260




Description

The MM74C89 is a 16-word by 4-bit random access read/write memory. Inputs to the memory consist of four address lines, four data input lines, a write enable line and a memory enable line. The four binary address inputs are decoded internally to select each of the 16 possible word locations. An internal address register MM74C89 latches the address information on the positive to negative transition of the memory enable input. The four 3-STATE data output lines working in conjunction with the memory enable input provide for easy memory expansion.

Address Operation: Address inputs of MM74C89 must be stable tSA prior to the positive to negative transition of memory enable. It is thus not necessary to hold address information stable for more than tHA after the memory is enabled (positive to negative transition of memory enable).

Write Operation: Information present at the data inputs of MM74C89 is written into the memory at the selected address by bringing write enable and memory enable LOW.




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