MM74C73N

Flip Flops Dual J-K Flip-Flop

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MM74C73N Picture
SeekIC No. : 00433674 Detail

MM74C73N: Flip Flops Dual J-K Flip-Flop

floor Price/Ceiling Price

Part Number:
MM74C73N
Mfg:
Fairchild Semiconductor
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Quick Details

Number of Circuits : 2 Logic Family : 74C
Logic Type : CMOS Polarity : Inverting/Non-Inverting
Input Type : Single-Ended Output Type : Differential
Propagation Delay Time : 300 ns High Level Output Current : - 8 mA
Low Level Output Current : 8 mA Supply Voltage - Max : 15 V
Maximum Operating Temperature : + 125 C Mounting Style : Through Hole
Package / Case : PDIP-14 Packaging : Rail    

Description

Maximum Operating Temperature : + 125 C
Number of Circuits : 2
Logic Type : CMOS
Input Type : Single-Ended
Mounting Style : Through Hole
Polarity : Inverting/Non-Inverting
Output Type : Differential
Low Level Output Current : 8 mA
Package / Case : PDIP-14
Propagation Delay Time : 300 ns
High Level Output Current : - 8 mA
Supply Voltage - Max : 15 V
Packaging : Rail
Logic Family : 74C


Features:

·  Supply voltage range: 3V to 15V
·  Tenth power TTL compatible: Drive 2 LPTTL loads
·  High noise immunity: 0.45 VCC (typ.)
·  Medium speed operation: 10 MHz (typ.)



Pinout

  Connection Diagram


Specifications

Voltage at Any Pin ...................−0.3V to VCC + 0.3V
Operating Temperature Range ....−55°C to +125°C
Storage Temperature ..................−65°C to +150°C
Power Dissipation
Dual-In-Line ...............................................700 mW
Small Outline ..............................................500 mW
Lead Temperature
(Soldering, 10 seconds) ................................260°C
Operating VCC Range........................... +3V to 15V
Note 2: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed. Except for "Operating Temperature
Range" they are not meant to imply that the devices should be operated
at these limits. The table of Electrical Characteristics provides
conditions for actual device operation.

VCC (Max) 18V



Description

The MM74C73 and MM74C76 dual J-K flip-flops MM74C73N are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. The MM74C76 flip flops also include preset inputs and are supplied in 16 pin packages. This flip-flop MM74C73N is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear or preset is independent of the clock and is accomplished by a low level on the respective input.




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