MM54HCT573

Features: ` TTL input characteristic compatible` Typical propagation delay: 18 ns` Low input current: 1 A maximum` Low quiescent current: 80 A maximum` Compatible with bus-oriented systems` Output drive capability: 15 LS-TTL loadsSpecificationsIf Military/Aerospace specified devices are required,p...

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MM54HCT573: Features: ` TTL input characteristic compatible` Typical propagation delay: 18 ns` Low input current: 1 A maximum` Low quiescent current: 80 A maximum` Compatible with bus-oriented systems` Output d...

floor Price/Ceiling Price

Part Number:
MM54HCT573
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

` TTL input characteristic compatible
` Typical propagation delay: 18 ns
` Low input current: 1 A maximum
` Low quiescent current: 80 A maximum
` Compatible with bus-oriented systems
` Output drive capability: 15 LS-TTL loads



Specifications

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)                                              -0.5 to +7.0V
DC Input Voltage (VIN)                                            -1.5 to VCC+1.5V
DC Output Voltage (VOUT)                                      -0.5 to VCC+0.5V
Clamp Diode Current (IIK, IOK)                                ±20 mA
DC Output Current, per pin (IOUT)                          ±35 mA
DC VCC or GND Current, per pin (ICC)                     ±70 mA
Storage Temperature Range (TSTG)                       -65 to+150
Power Dissipation (PD)
(Note 3)                                                                  600 mW
S.O. Package only                                                   500 mW
Lead Temp. (TL) (Soldering 10 seconds)                 260



Description

The MM54HCT573/MM74HCT573 octal D-type latches and MM54HCT574/MM74HCT574 Octal D-type flip flops advanced silicon-gate CMOS technology, which provides the inherent benefits of low power consumption and wide power supply range, but are LS-TTL input and output characteristic & pin-out compatible. The TRI-STATE outputs of MM54HCT573 are capable of driving 15 LS-TTL loads. All inputs are protected from damage due to static discharge by internal diodes to VCC and ground.

When the MM54HCT573/MM74HCT573 LATCH ENABLE input is high, the Q outputs will follow the D inputs. When the LATCH ENABLE goes low, data at the D inputs will be retained at the outputs until LATCH ENABLE returns high again. When a high logic level is applied to the OUTPUT CONTROL input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

The MM54HCT574/MM74HCT574 are positive edge triggered flip-flops. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the CLOCK (CK) input. When a high logic level is applied to the OUTPUT CONTROL (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

MM54HCT573 devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug in replacements for LSTTL devices and can be used to reduce power consumption in existing designs.




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