MM54HCT190

Level changes on Enable or Down/Up can be made regardless of the level of the clock.
Low quiescent supply current: 80 mA maximum (74HCT Series)
Low input current: 1 mA maximum
TTL compatible inputs

These high speed synchronous counters MM54HCT190 utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption of CMOS technology, along with the speeds of low power Schottky TTL. These circuits are synchronous, reversible, up/down counters. The MM54HCT191/MM74HCT191 are 4-bit binary counters and the MM54HCT190/MM74HCT190 are BCD counters.

Synchronous operation of MM54HCT190 is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master-slave flip-flops MM54HCT190 are triggered on a low-to-high level transition of the clock input, if the enable input is low. A high at the enable input inhibits counting. The direction of the count is determined by the level of the down/up input. When low, the counter counts up and when high, it counts down.

These counters MM54HCT190 are fully programmable; that is, the outputs may be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output of MM54HCT190 will change independent of the level of the clock input. This feature allows the counters to be used as divide by N dividers by simply modifying the count length with the preset inputs.

Two outputs of MM54HCT190 have been made available to perform the cascading function; ripple clock and maximum/minimum count. The latter output produces a high level output pulse with a duration approximately equal to one complete cycle of the clock when the counter overflows or underflows. The ripple clock output produces a low level output pulse equal in width to the low level portion of the clock input when an overflow or underflow condition exists. The counters MM54HCT190 can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The maximum/minimum count output of MM54HCT190 can be used to accomplish look-ahead for high speed operation.

MM54HCT190 devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LSTTL devices can be used to reduce power consumption in existing designs.