Features: • 4.4 MHz Minimum Data Input Rate
• High-Voltage, High-Current Outputs
• Per-Output Over-Current Shutdown (500mA Typical)
• Undervoltage Lockout
• Thermal Shutdown
• Output Fault Flag
• Output Transient Protection Diodes
• CMOS, PMOS, NMOS, and TTL Compatible Inputs
• Internal Pull-Down Resistors
• Low-Power CMOS Latches
• Single or Split Supply OperationPinout
SpecificationsOutput Voltage (VCE) ....................................................80V
Supply Voltage (VDD) ....................................................15V
(VDD VEE) ...................................................................25V
Input Voltage (VIN) ..............................0.3V to VDD+0.3V
Continuous Collector Current (IC) ............................500mA
Protected Current ...........................................1.5A, Note 1
Power Dissipation (PD)
Plastic DIP (N) .............................................................2.4W
Derate above TA = +25 ......................................24mW/
PLCC (V) ......................................................................1.6W
Derate above TA = +25 ......................................16mW/
Wide SOIC (WM) .........................................................1.4W
Derate above TA = +25 .....................................14mW/
Operating Temperature (TA)
Plastic DIP (N), PLCC (V), SOIC (WM) .. ......40 to +85
Storage Temperature (TS) .......................65 to +150
Junction Temperature (TJ) ...................................... +150
ESD ......................................................................... Note 2
Note 1: Each channel. VEE connection must be designed to minimize inductance and resistance.
Note 2: Devices are input-static protected but can be damage by extremely high static charges.DescriptionThe MIC59P50 parallel-input latched driver is a high-voltage (80V), high-current (500mA) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, and OUTPUT ENABLE functions. Similar to the MIC5801, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and over-current shutdown.
The bipolar/MOS combination MIC59P50 provides an extremely low-power latch with maximum interface flexibility. The MIC59P50 has open-collector outputs capable of sinking 500mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V above VEE (50V sustaining). The drivers of MIC59P50 can be operated with a split supply, where the negative supply is down to 20V and may be paralleled for higher load current capability.
With a 5V logic supply, the MIC59P50 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors.
Each of these eight outputs of MIC59P50 has an independent over-current shutdown at 500 mA. Upon current shutdown, the affected channel will turn OFF and the flag will go low until VDD is cycled or the ENABLE/RESET pin is pulsed high. Current pulses less than 2µs will not activate over-current shutdown. Temperatures above 165°C will shut down the device and activate the open collector FLAG output at pin 1. The UVLO circuit MIC59P50 disables the outputs at low VDD; hysteresis of 0.5V is provided.
MIC59P50 Data Sheet
