MH1S64CWXTJ-12

Features:

	Frequency	CLK Access Time (Component SDRAM)
-12	83MHz	8ns(CL=3)
-15	67MHz	9.5ns (CL=2)
-1539	67MHz	9ns (CL=3)

·Utilizes industry standard 1M x 16 Synchronous DRAMsTSOP and industry standard EEPROM in TSSOP
·168-pin (84-pin dual in-line package)
·Clock frequency 83MHz/67MHz
·single 3.3V±0.3V power supply
·Fully synchronous operation referenced to clock rising edge
·Dual bank operation controlled by BA(Bank Address)
·Burst length- 1/2/4/8(programmable)
·/CAS latency- 1/2/3(programmable)
·Burst length- 1/2/4/8(programmable)
·Column access - random
·Auto precharge / All bank precharge controlled by A1
·Auto refresh and Self refresh
·4096 refresh cycle /64ms
·LVTTL Interface

Specifications

Symbol	Parameter	Condition	Ratings	Unit
Vdd	Supply Voltage	with respect to Vss	-0.5 ~ 4.6	V
VI	Input Voltage	with respect to Vss	-0.5 ~ 4.6	V
VO	Output Voltage	with respect to Vss	-0.5 ~ 4.6	V
IO	Output Current		50	mA
Pd	Power Dissipation	Ta=25°C	4	W
Topr	Operating Temperature		0 ~ 70	°C
Tstg	Storage Temperature		-40 ~ 100	°C

Description

The MH1S64CWXTJ is 1048576-word by 64-bit Synchronous DRAM module. This consists of four industry standard 1Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.

The mounting of TSOP on a card edge Dual Inline package of MH1S64CWXTJ provides any application where high densities and large quantities of memory are required.

MH1S64CWXTJ is a socket type - memory modules, suitable for easy interchange or addition of modules.