MH16D64AKQC-10

- Utilizes industry standard 8M X 16 DDR Synchronous DRAMs
in TSOP package , industry standard EEPROM(SPD) in
TSSOP package
- Vdd=Vddq=2.5v ±0.2V
- Double data rate architecture; two data transf ers per
clock cycle
- Bidirectional, data strobe (DQS) is transmitted/receiv ed
with data
- Dif f erential clock inputs (CLK and /CLK)
- data and data mask ref erenced to both edges of DQS
- /CAS latency - 2.0/2.5 (programmable)
- Burst length- 2/4/8 (programmable)
- Auto precharge / All bank precharge controlled by A10
- 4096 ref resh cycles /64ms
- Auto ref resh and Self ref resh
- Row address A0-11 / Column address A0-8
- SSTL_2 Interf ace
- Module 2bank Conf igration
- Burst Ty pe - sequential/interleav e(programmable)
- Commands entered on each positiv e CLK edge

The MH16D64AKQC is 16777216 - word x 64-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

MH16D64AKQC consists of 8 industry standard 8M x 16 DDR Sy nchronous DRAMs in TSOP with SSTL_2 interf ace which achiev es v ery high speed data rate up to 133MHz.

MH16D64AKQC socket-ty pe memory module is suitable f or main memory in computer systems and easy to interchange or add modules.