Features: • 12 10/100Mbps Autosensing, Fast Ethernet ports with Reduced MII Interface
• Single Gigabit Ethernet port
• Supports both GMII and integrated Physical Coding Sublayer with Ten Bit Interface (TBI) logic to interface directly with Gigabit transceivers
• Two-chip solution for 24+2 configuration - 32-bit wide bi-directional pipe at 100Mhz provides 6.4Gbps pipe to connect two MDS213 chips
• Supports up to 6.548 Mpps system throughput using non-blocking architecture
• High performance Layer 2 packet forwarding and filtering at full wire speed.
• Very low latency through single store and forward at ingress port and cut-through switching at destination ports
• Port Trunking and Load Sharing for high bandwidth links between switches
• On-chip address lookup engine and memory for up to 2K MAC addresses
• Parallel Flash interface for fast self initialization
• Supports packet filtering and port security
- System wide filtering
- Static MAC destination and source address filtering
- VLAN for multicast/broadcast filtering
- Protocol filtering
- Local port filtering
- Aging control for secure MAC addresses
- Provides 256-port and ID Tagged Virtual LANs (VLANs) 802.1Q
• ID Tagging Insertion/Extraction
• Supports IP Multicasting through IGMP Snooping
• XpressFlow Quality of Service (QoS), IEEE 802.1p, supports 4 Level transmission priorities, weighted fair queuing based packet scheduling, user mapping of priority levels and weights
• Full duplex Ethernet IEEE 803.2x flow control minimizes traffic congestion
• Supports back-pressure flow control for half duplex mode
• Flooding and Broadcasting control
• Link status and TX/RX activity through serial LED interface
• Up to 64K using management CPU memorySpecificationsPackage: 456 HBGA (Heatslug BGA)
Storage Temperature: -65C to +150C
Operating Temperature: 0C to +70C
Maximum Junction Temperature:125C
Supply Voltage VCC with Respect to VSS .......+3.0 V to +3.6 V
Supply Voltage VDD with Respect to VSS ......+2.38 V to +2.75 V
Voltage on 5V Tolerant Input Pins ........-0.5 V to (VCC + 3.3 V)
Caution: Stresses above those listed may cause permanent device failure. Functionality at or above these limits is
not implied. Exposure to the Absolute Maximum Ratings for extended periods may affect device reliability.
DescriptionThe Zarlink MDS213 is a 12-port 10/100Mbps + 1Gbps high-performance, non-blocking Ethernet switch with onchip
address memory and address lookup engine. A single chip provides 12 - 10/100Mbps ports and 1 - 1000Mbps
port. The MDS213 can be utilized in both managed and unmanaged switching applications.
The 3.2 Gbps XPipe allows a high-speed connection between two MDS213 chips, providing a optimal, low-cost,
workgroup switch with 24 10/100 Fast Ethernet ports and 2 Gigabit Ethernet ports.
In half-duplex mode, all ports support back pressure flow control to minimize the risk of losing data for long activity
bursts. In full-duplex mode, IEEE 802.3x frame based flow control is used. With full-duplex capabilities, each Fast
Ethernet ports supports 200Mbps aggregate bandwidth connections, while the Gigabit Ethernet port supports 2
Gbps to desktops, servers, or other high-performance switches. The Physical Coding Sublayer is integrated onchip
with Ten Bit Interface (TBI) and this Physical Coding Sublayer can be bypassed when the GMII interface is
used. The MDS213 supports port trunking/load sharing on the 10/100Mbps ports. Port trunking/load sharing can be used to group ports between interlinked switches for increased system bandwidth. Ports within a trunk must reside within a single MDS213, such that trunks may not be configured across two switches.
The on-chip address lookup engine supports up to 2K MAC addresses and up to 256 IEEE 802.1Q Virtual LANs
(VLAN). Each port may be programmed to recognize VLANs, and will transmit frames along with their VLAN Tags,
for interoperability, to systems that support VLAN Tagging. Each port independently collects statistical information using SNMP and the Remote Monitoring Management Information Base (RMON - MIB). Access to these statistical counter/registers are provided via the CPU interface. SNMP Management frames may be received and/or transmitted via the CPU interface and thus creates a complete network management solution. The MDS213 utilizes cost effective, high performance, pipelined SBRAM to achieve full wire speed on all ports simultaneously. Data is buffered into memory, using 0-128 byte bursts, from the ingress ports, and transferred to an internal transmit FIFO, before being sent from the frame memory to the egress output ports. Extremely high memory bandwidth is therefore achieved, which allows each of the ports to be active without creating a memory bottleneck.
The MDS213 is fabricated with 2.5 V technology, where the inputs are 3.3V tolerant and the outputs are capable of directly interfacing to Low-Voltage TTL levels. The Zarlink MDS213 is packaged in a 456-pin Ball Grid Array.
MDS213 Data Sheet
