Features: • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell• 4-bankx 1,048,576-wordx 16-bit configuration• 3.3 V power supply, ±0.3 V tolerance• Input : LVTTL compatible• Output : LVTTL compatible• Refresh : 4096 cycles/64 ms• Programmab...
MD56V62160/H: Features: • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell• 4-bankx 1,048,576-wordx 16-bit configuration• 3.3 V power supply, ±0.3 V tolerance• Input : LV...
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• Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
• 4-bankx 1,048,576-wordx 16-bit configuration
• 3.3 V power supply, ±0.3 V tolerance
• Input : LVTTL compatible
• Output : LVTTL compatible
• Refresh : 4096 cycles/64 ms
• Programmable data transfer mode
CAS latency (2, 3)
Burst length (2, 4, 8)
Data scramble (sequential, interleave)
• CBR auto-refresh, Self-refresh capability
• Package: 54-pin 400 mil plastic TSOP (Type II) (TSOPII54-P-400-0.80-K) (Product : MD56V62160/H-xxTA) xx indicates speed rank.
Parameter |
Symbol |
Rating |
Unit |
Voltage on Any Pin Relative to VSS |
VIN, VOUT |
0.5 to VCC + 0.5 |
V |
VCC Supply Voltage |
VCC, VCCQ |
0.5 to 4.6 |
V |
Storage Temperature |
Tstg |
55 to 150 |
°C |
Power Dissipation |
PD* |
1 |
W |
Short Circuit Current |
IOS |
50 |
mA |
Operating Temperature |
Topr |
0 to 70 |
°C |
The MD56V62160/H is a 4-bankx1,048,576-wordx16-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible.