MCM72BB64

Features:

• Pentiumstyle Burst Counter on Board
• 160 Pin Card Edge Module
• Single 5 V ± 5% Power Supply
• All Inputs and Outputs are TTL Compatible
• Three State Outputs
• Byte Parity
• Byte Write Capability
• Fast Module Clock Rates: 66 MHz, 60 MHz
• Decoupling Capacitors for each Fast Static RAM
• High Quality MultiLayer FR4 PWB With Separate Power and Ground Planes
• I/Os are 3.3 V Compatible
• Burndy Connector, Part Number: CELP2X80SC3Z48



Specifications

Rating	Symbol	Value	Unit
Power Supply Voltage	VCC	0.5 to + 7.0	V
Voltage Relative to VSS for Any Pin Except VCC	Vin, Vout	0.5 to VCC + 0.5	V
Output Current (per I/O)	Iout	± 30	mA
Power Dissipation	PD	6.0	W
Temperature Under Bias	Tbias	10 to + 85	°C
Operating Temperature	TA	0 to +70	°C
Storage Temperature	Tstg	55 to + 125	°C

Description

   The MCM72BB64 are designed to provide a burstable,high performance, 256K/512K L2 cache for the Pentium microprocessor. The modules are configured as 32K x 72 and 64K x 72 bits in a 160 pin card edge memory module. Each module uses four of Motorola's MCM67B518 or MCM67B618 BiCMOS BurstRAMs.

   Bursts of the MCM72BB64 can be initiated with either address status processor (ADSP) or address status controller (ADSV). Subsequent burst addresses are generated internal to the BurstRAM by the burst advance (ADV) input pin.Write cycles are internally self timed and are initiated by the rising edge of the clock (K) input. Eight write enables are provided for byte write control.

   The cache family of the MCM72BB64 is designed to interface with popular Pentium cache controllers with on board tag.PD0 PD2 are reserved for density identification.CASE 111301 TOP VIEW1