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MCF5272

Features: A block diagram of the MCF5272 is shown in Figure 1-1. The main features are as follows:• Static Version 2 ColdFire variable-length RISC processor- 32-bit address and data path on-chip- 66-MHz processor core and bus frequency- Sixteen general-purpose 32-bit data and address registe...

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MCF5272: Features: A block diagram of the MCF5272 is shown in Figure 1-1. The main features are as follows:• Static Version 2 ColdFire variable-length RISC processor- 32-bit address and data path on-ch...

MCF5272 Data Sheet

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MCF5272
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5000

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Description



Features:

A block diagram of the MCF5272 is shown in Figure 1-1. The main features are as follows:
• Static Version 2 ColdFire variable-length RISC processor
- 32-bit address and data path on-chip
- 66-MHz processor core and bus frequency
- Sixteen general-purpose 32-bit data and address registers
- Multiply-accumulate unit (MAC) for DSP and fast multiply operations
• On-chip memories
- 4-Kbyte SRAM on CPU internal bus
- 16-Kbyte ROM on CPU internal bus
- 1-Kbyte instruction cache
• Power management
- Fully-static operation with processor sleep and whole-chip stop modes
- Very rapid response to interrupts from the low-power sleep mode (wake-up feature)
- Clock enable/disable for each peripheral when not used
- Software-controlled disable of external clock input for virtually zero power consumption (low-power stop mode)
• Two universal asynchronous/synchronous receiver transmitters (UARTs)
- Full-duplex operation
- Based on MC68681 dual-UART (DUART) programming model
- Flexible baud rate generator
- Modem control signals available (CTS and RTS)
- Processor interrupt and wake-up capability
- Enhanced Tx, Rx FIFOs, 24 bytes each


Specifications

This section contains information on the maximum ratings of the MCF5272 microcontroller.


Description

The primary objective of this user's manual is to define the functionality of the MCF5272 processors for use by software and hardware developers. The information in this book is subject to change without notice, as described in the disclaimers on the title page of this book. As with any technical documentation, it is the readers' responsibility to be sure he is using the most recent version of the documentation.




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