MC9S12Q128

Features: • 16-bit HCS12 core: - HCS12 CPU Upward compatible with M68HC11 instruction set Interrupt stacking and programmer's model identical to M68HC11 Instruction queue Enhanced indexed addressing - MMC (memory map and interface) - INT (interrupt control) - BDM (background debug mode) ...

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SeekIC No. : 004417443 Detail

MC9S12Q128: Features: • 16-bit HCS12 core: - HCS12 CPU Upward compatible with M68HC11 instruction set Interrupt stacking and programmer's model identical to M68HC11 Instruction queue Enhanced indexed ...

floor Price/Ceiling Price

Part Number:
MC9S12Q128
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• 16-bit HCS12 core:
  - HCS12 CPU
  Upward compatible with M68HC11 instruction set
  Interrupt stacking and programmer's model identical to M68HC11
  Instruction queue
  Enhanced indexed addressing
  - MMC (memory map and interface)
  - INT (interrupt control)
  - BDM (background debug mode)
  - DBG12 (enhanced debug12 module, including breakpoints and change-of-flow trace buffer)
  - MEBI (multiplexed expansion bus interface) available only in 80-pin package version
• Wake-up interrupt inputs:
  - Up to 12 port bits available for wake up interrupt function with digital filtering
• Memory options:
  - 32Kbyte ROM or Flash EEPROM (erasable in 512-byte sectors)
   64K, 96K, or 128Kbyte ROM or Flash EEPROM (erasable in 1024-byte sectors)
  - 1K, 2K,, 3K or 4K Byte RAM
• Analog-to-digital converters:
  - One 8-channel module with 10-bit resolution
  - External conversion trigger capability
  - One 1M bit per second, CAN 2.0 A, B software compatible module
  - Five receive and three transmit buffers
  - Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit, or 8 x 8 bit
  - Four separate interrupt channels for Rx, Tx, error, and wake-up
  - Low-pass filter wake-up function
  - Loop-back for self test operation
• Timer module (TIM):
  - 6-Channel timer
  - Each channel configurable as either input capture or output compare
  - Simple PWM mode
  - Modulo reset of timer counter
  - 16-bit pulse accumulator
  - External event counting
  - Gated time accumulation
• PWM module:
  - Programmable period and duty cycle
  - 8-bit 4-channel or 16-bit 2-channel
  - Separate control for each pulse width and duty cycle
  - Center-aligned or left-aligned outputs
  - Programmable clock select logic with a wide range of frequencies
  - Fast emergency shutdown input
• Serial interfaces:
  - One asynchronous serial communications interface (SCI)
  - One synchronous serial peripheral interface (SPI)
• CRG (clock reset generator module)
  - Windowed COP watchdog
  - Real time interrupt
  - Clock monitor
  - Pierce or low current Colpitts oscillator
  - Phase-locked loop clock frequency multiplier
  - Limp home mode in absence of external clock
  - Low power 0.5MHz to 16MHz crystal oscillator reference clock
• :Operating frequency
  - 16MHz equivalent to 8MHz Bus Speed in expanded bus modes
  - Option of 32 MHz equivalent to 16MHz Bus Speed
• Internal 2.5V regulator:
  - Supports an input voltage range from 2.97V to 5.5V
  - Low power mode capability
  - Includes low voltage reset (LVR) circuitry
  - Includes low voltage interrupt (LVI) circuitry
• 48-pin LQFP, 52-pin LQFP, or 80-pin QFP package:
  - Up to 58 I/O lines with 5V input and drive capability (80-pin package)
  - Up to 2 dedicated 5V input only lines (IRQ, XIRQ)
  - 5V 8 A/D converter inputs and 5V I/O
• Development support:
  - Single-wire background debug™ mode (BDM)
  - On-chip hardware breakpoints
  - Enhanced DBG12 debug features



Specifications

Num Rating Symbol Min Max Unit
1 I/O, Regulator and Analog Supply Voltage VDD5 0.3 6.5 V
2 Digital Logic Supply Voltage(1) VDD 0.3 3.0 V
3 PLL Supply Voltage 1 VDDPLL 0.3 3.0 V
4 Voltage difference VDDX to VDDR and VDDA VDDX 0.3 0.3 V
5 Voltage difference VSSX to VSSR and VSSA VSSX 0.3 0.3 V
6 Digital I/O Input Voltage VIN 0.3 6.5 V
7 Analog Reference VRH, VRL 0.3 6.5 V
8 XFC, EXTAL, XTAL inputs VILV 0.3 3.0 V
9 TEST input VTEST 0.3 10.0 V
10 Instantaneous Maximum Current
Single pin limit for all digital I/O pins (2)
ID 25 +25 mA
11 Instantaneous Maximum Current
Single pin limit for XFC, EXTAL, XTAL(3)
IDL 25 +25 mA
12 Instantaneous Maximum Current
Single pin limit for TEST(4)
IDT 0.25 0 mA
13 Operating Temperature Range (packaged) TA 40 125 °C
14 Operating Temperature Range (junction) TJ 40 140 °C
15 Storage Temperature Range Tstg 65 155 °C



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