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MC9S12C

Features: • 16-bit HCS12 CORE HCS12 CPU i. Upward compatible with M68HC11 instruction set ii. Interrupt stacking and programmer's model identical to M68HC11 iii. Instruction queue iv. Enhanced indexed addressing MMC (memory map and interface) INT (interrupt control) BDM (background debug mod...

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SeekIC No. : 004417404 Detail

MC9S12C: Features: • 16-bit HCS12 CORE HCS12 CPU i. Upward compatible with M68HC11 instruction set ii. Interrupt stacking and programmer's model identical to M68HC11 iii. Instruction queue iv. Enhanced...

MC9S12C Data Sheet

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Part Number:
MC9S12C
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• 16-bit HCS12 CORE
HCS12 CPU
    i. Upward compatible with M68HC11 instruction set
    ii. Interrupt stacking and programmer's model identical to M68HC11
    iii. Instruction queue
    iv. Enhanced indexed addressing
MMC (memory map and interface)
INT (interrupt control)
BDM (background debug mode)
DBG12 (enhanced debug12 module, including breakpoints and change-of-flow trace buffer)
MEBI : Multiplexed Expansion Bus Interface (available only in 80 pin package version)
• Wake-up interrupt inputs
Up to 12-port bits available for wake up interrupt function with digital filtering
• Memory options
32K, 64K, 96K or 128KByte Flash EEPROM (erasable in 512-byte sectors)
2K or 4K Byte RAM
• Analog-to-Digital Converters
One 8-channel module with 10-bit resolution.
External conversion trigger capability
• One 1M bit per second, CAN 2.0 A, B software compatible modules
Five receive and three transmit buffers
Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
Four separate interrupt channels for Rx, Tx, error and wake-up
Low-pass filter wake-up function
Loop-back for self test operation
• Timer Module (TIM)
8-Channel Timer
Each Channel Configurable as either Input Capture or Output Compare
Simple PWM Mode
Modulo Reset of Timer Counter
16-Bit Pulse Accumulator
External Event Counting
Gated Time Accumulation
• 6 PWM channels
Programmable period and duty cycle
8-bit 6-channel or 16-bit 3-channel
Separate control for each pulse width and duty cycle
Center-aligned or left-aligned outputs
Programmable clock select logic with a wide range of frequencies
Fast emergency shutdown input
• Serial interfaces
One asynchronous serial communications interface (SCI)
One synchronous serial peripheral interface (SPI)
• CRG (Clock Reset Generator Module)
Windowed COP watchdog,
Real time interrupt,
Clock monitor,
Pierce or low current Colpitts oscillator
Phase-locked loop clock frequency multiplier
Limp home mode in absence of external clock
Low power 0.5 to 16 MHz crystal oscillator reference clock
• Operating frequency
32MHz equivalent to 16MHz Bus Speed for single chip
32MHz equivalent to 16MHz Bus Speed in expanded bus modes
Option: 50MHz equivalent to 25MHz Bus Speed
• Internal 2.5V Regulator
Supports an input voltage range from 2.97V to 5.5V
Low power mode capability
Includes low voltage reset (LVR) circuitry
Includes low voltage interrupt (LVI) circuitry
• 48-Pin LQFP, 52-Pin LQFP or 80-Pin QFP package
Up to 58 I/O lines with 5V input and drive capability (80 pin package)
Up to 2 dedicated 5V input only lines (IRQ, XIRQ)
5V 8 A/D converter inputs and 5V I/O
• Development support
Single-wire background debug™ mode (BDM)
On-chip hardware breakpoints
Enhanced DBG12 debug features


Pinout

Connection Diagram


Specifications

Num
Rating
Symbol
Min
Max
Unit
1
 I/O, Regulator and Analog Supply Voltage
VDD5
-0.3
6.5
V
2
 Digital Logic Supply Voltage1
VDD
-0.3
3.0
V
3
 PLL Supply Voltage (1)
VDDPLL
-0.3
3.0
V
4
 Voltage difference VDDX to VDDR and VDDA
VDDX
-0.3
0.3
V
5
 Voltage difference VSSX to VSSR and VSSA
VSSX
-0.3
0.3
V
6
 Digital I/O Input Voltage
VIN
-0.3
6.5
V
7
 Analog Reference
VRH, VRL
-0.3
6.5
V
8
 XFC, EXTAL, XTAL inputs
VILV
-0.3
3.0
V
9
 TEST input
VTEST
-0.3
10.0
V
10
 Instantaneous Maximum Current
Single pin limit for all digital I/O pins 2
ID
-25
+25
mA
11
 Instantaneous Maximum Current
Single pin limit for XFC, EXTAL, XTAL3
IDL
-25
+25
mA
12
 Instantaneous Maximum Current
Single pin limit for TEST4
IDT
-0.25
0
mA
13
 Operating Temperature Range (packaged)
TA
-40
125
°C
14
 Operating Temperature Range (junction)
TJ
-40
140
°C
15
 Storage Temperature Range
Tstg
-65
155
°C



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