Features: · ARM920T Microprocessor Core· AHB to IP Bus Interfaces (AIPIs)· External Interface Module (EIM)· SDRAM Controller (SDRAMC)· DPLL Clock and Power Control Module· Two Universal Asynchronous Receiver/Transmitters (UART 1 and UART 2)· Serial Peripheral Interface (SPI)· Two General-Pur...
MC9328MXD: Features: · ARM920T Microprocessor Core· AHB to IP Bus Interfaces (AIPIs)· External Interface Module (EIM)· SDRAM Controller (SDRAMC)· DPLL Clock and Power Control Module· Two Universal Asynch...
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Symbol | Rating | Minimum | Maximum | Unit |
NVDD | DC I/O Supply Voltage | -0.3 | 3.3 | V |
QVDD | DC Internal (core = 100 MHz) Supply Voltage | -0.3 | 1.9 | V |
AVDD | DC Analog Supply Voltage | -0.3 | 3.3 | V |
BTRFVDD | DC Bluetooth Supply Voltage | -0.3 | 3.3 | V |
VESD_HBM | ESD immunity with HBM (human body model) | 2000 | V | |
VESD_MM | ESD immunity with MM (machine model) | 100 | V | |
ILatchup | Latch-up immunity | 200 | mA | |
Test | Storage temperature | -55 | 150 | |
Pmax | Power Consumption | 8001 | 13002 | mW |
The DTACK MC9328MXD signal is the external input data acknowledge signal. When using the external DTACK signal as a data acknowledge signal, the bus time-out monitor generates a bus error when a bus cycle is not terminated by the
external DTACK MC9328MXD signal after 1022 HCLK counts have elapsed. Only the CS5 group supports DTACK signal function when the external DTACK MC9328MXD signal is used for data acknowledgement.