PinoutSpecifications Symbol Parameter Value Condition Unit VCC DC Supply Voltage 0.5 to +7.0 V VI DC Input Voltage 0.5 3 VI 3 +7.0 V VO DC Output Voltage 0.5 3 VO 3 +7.0 Output in 3State V 0.5 3 VO 3 VCC + 0.5 Note 1. V IIK DC Input Diode Current 50 VI &l...
MC74LCX2245: PinoutSpecifications Symbol Parameter Value Condition Unit VCC DC Supply Voltage 0.5 to +7.0 V VI DC Input Voltage 0.5 3 VI 3 +7.0 V VO DC Output Voltage 0.5 3 VO 3 +7....
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Features: Operating range: 38 to 47 Gb/s (min.) (note)Signal regeneration with full-rate clock sig...
Symbol | Parameter | Value | Condition | Unit |
VCC | DC Supply Voltage | 0.5 to +7.0 | V | |
VI | DC Input Voltage | 0.5 3 VI 3 +7.0 | V | |
VO | DC Output Voltage | 0.5 3 VO 3 +7.0 | Output in 3State | V |
0.5 3 VO 3 VCC + 0.5 | Note 1. | V | ||
IIK | DC Input Diode Current | 50 | VI < GND | mA |
IOK | DC Output Diode Current | 50 | VO < GND | mA |
+50 | VO > VCC | mA | ||
IO | DC Output Source/Sink Current | +50 | mA | |
ICC | DC Supply Current Per Supply Pin | ±100 | mA | |
IGND | DC Ground Current Per Ground Pin | ±100 | mA | |
TSTG | Storage Temperature Range | 65 to +150 | °C |
The MC74LCX2245 is a high performance, noninverting octal transceiver operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX2245 inputs to be safely driven from 5V devices. The MC74LCX2245 is designed to reduce output overshoot and undershoot and is suitable for memory address driving and all TTL level bus oriented transceiver applications; especially those requiring the very quiet outputs.
Current drive capability of MC74LCX2245 is 12mA at both A and B ports. The Transmit/Receive (T/R) input MC74LCX2245 determines the direction of data flow through the bidirectional transceiver. Transmit (activeHIGH) enables data from A ports to B ports; Receive (activeLOW) enables data from B to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.