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Features: • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 A• High Noise Immunity Characteristic of CMOS Devices• In Compliance with the Requirements Defined by ...

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SeekIC No. : 004416960 Detail

MC74HC393A: Features: • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 A• High ...

MC74HC393A Data Sheet

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Part Number:: MC74HC393A
Supply Ability:: 5000

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Product Details

Description

Features:

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 236 FETs or 59 Equivalent Gates

Pinout

Connection Diagram

Specifications

Symbol	Parameter	Value	Unit
V_CC	DC Supply Voltage (Referenced to GND)	0.5 to +7.0	V
V_in	DC Input Voltage (Referenced to GND)	1.5 to V_CC +1.5	V
V_out	DC Output Voltage (Referenced to GND)	0.5 to V_CC + 0.5	V
I_in	DC Input Current, per Pin	± 20	mA
I_out	DC Output Current, per Pin	± 25	mA
I_CC	DC Supply Current, V_CC and GND Pins	± 50	mA
P_D	Power Dissipation in Still Air, Plastic or Ceramic DIP† SOIC Package† SSop or Tssop package†	750 500 450	mW
T_stg	Storage Temperature	65 to + 150
T_L	Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP, SOIC or TSSOP Package) (Ceramic DIP)	260 300

*Maximum Ratings are those values beyond which damage to the device may occur.Functional operation
should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/ from 65 ° to 125
Ceramic DIP: 10 mW/ from 100 ° to 125
SOIC Package: 7 mW/ from 65 ° to 125

For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).

This device contains protection circuitry to guard against damage due to high static voltages or electric fields.However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V_in and V_out should be constrained to the range GND (V_in or V_out) V_CC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V_CC). Unused outputs must be left open.

Description

The MC54/74HC393A is identical in pinout to the LS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

MC74HC393A consists of two independent 4bit binary ripple counters with parallel outputs from each counter stage. A ÷ 256 counter can be obtained by cascading the two binary counters.

Internal flipflops MC74HC393A are triggered by hightolow transitions of the clock input. Reset for the counters is asynchronous and activehigh. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals of MC74HC393A are subject to decoding spikes and should not be used as clocks or as strobes except when gated with the Clock of the HC393A.

MC74HC393A

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