MC74HC373AN

Number of Circuits : 8
Maximum Operating Temperature : + 125 C
Polarity : Non-Inverting
Number of Output Lines : 3
Supply Voltage - Min : 2 V
High Level Output Current : - 7.8 mA
Low Level Output Current : 32 mA
Supply Voltage - Max : 6 V
Minimum Operating Temperature : - 55 C
Package / Case : PDIP-20
Packaging : Tube
Logic Family : 74HC
Logic Type : Transparent Latch
Propagation Delay Time : 125 ns at 2 V, 80 ns at 3 V, 25 ns at 4.5 V, 21 ns at 6 V


Features:

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 186 FETs or 46.5 Equivalent Ga


Pinout




Specifications

Symbol	Parameter	Value	Unit
vcc	DC Supply Voltage (Referenced to GND)	0.5 to +7.0	V
VIN	DC Input Voltage (Referenced to GND)	0.5 to VCC + 0.5	V
VOUT	DC Output Voltage (Referenced to GND)	0.5 to VCC + 0.5	V
LIN	DC Input Current, per Pin	±20	mA
IOUT	DC Onput Current, per Pin	±35	mA
ICC	DC Supply Current Per Supply Pin	±75	mA
PD	Power dissipation in still air piastic DIP SOIC package	750 500 450	mW
TSTG	Storage Temperature	65 to +150	°C
TL	Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)	260	°C

* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
?Derating - Plastic DIP: 10 mW/ from 65to 125
Ceramic DIP: 10 mW/ from 100 to 125
SOIC Package: 7 mW/ from 65 to 125
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).


Description

The MC74HC373A is identical in pinout to the LS373. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

These latches of MC74HC373AN appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.

The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the highimpedance state. Thus, data may be latched even when the outputs are not enabled.

The HC373A is identical in function to the HC573A which has the data inputs on the opposite side of the package from the outputs to facilitate PC board layout.

The HC373A is the noninverting version of the HC533A.

Parameters:

Technical/Catalog Information	MC74HC373AN
Vendor	ON Semiconductor
Category	Integrated Circuits (ICs)
Logic Type	D-Type Transparent Latch
Independent Circuits	1
Circuit	8:8
Output Type	Tri-State
Current - Output High, Low	7.8mA, 7.8mA
Mounting Type	Through Hole
Package / Case	20-DIP
Packaging	Tube
Operating Temperature	-55°C ~ 125°C
Delay Time - Propagation	21ns
Voltage - Supply	2 V ~ 6 V
Lead Free Status	Contains Lead
RoHS Status	RoHS Non-Compliant
Other Names	MC74HC373AN MC74HC373AN MC74HC373ANOS ND MC74HC373ANOSND MC74HC373ANOS