Features: • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 mA• High Noise Immunity Characteristic of CMOS Devices• In Compliance with the Requirements Defined by...
MC74HC280: Features: • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 mA• High...
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Features: Operating range: 38 to 47 Gb/s (min.) (note)Signal regeneration with full-rate clock sig...
Symbol | Parameter | Value | Unit |
vcc | DC Supply Voltage (Referenced to GND) | 0.5 to +7.0 | V |
VIN | DC Input Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
VOUT | DC Output Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
LIN | DC Input Current, per Pin | ±20 | mA |
IOUT | DC Onput Current, per Pin | ±25 | mA |
ICC | DC Supply Current Per Supply Pin | ±50 | mA |
PD | Power dissipation in still air piastic DIP SOIC package |
750 500 |
mW |
TSTG | Storage Temperature | 65 to +150 | °C |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 | °C |
The MC74HC280 is identical in pinout to the LS280. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This circuit MC74HC280 consists of 9 databit inputs (A through I) and 2 outputs (Even Parity and Odd Parity) to allow both odd and even parity applications. Words greater than 9bits can be accommodated by cascading other HC280 devices.
MC74HC280 can be used in systems utilizing the LS180 parity generator/ checker. Although the HC280 does not have expander inputs, the corresponding function is provided by an input at pin 4 and the absence of any connection at pin 3. MC74HC280 permits the HC280 to be substituted for the LS180 to produce a similar function, even if the HC280s are mixed with existing LS180s. NOTE: Pullup resistors must be used on the LS180 outputs to interface with the HC280.