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MC74ACT74

Features: • Outputs Source/Sink 24 mA• 'ACT74 Has TTL Compatible InputsPinoutSpecifications Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V Vin DC Input Voltage (Referenced to GND) 0.5 to VCC +0.5 V Vout ...

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SeekIC No. : 004416756 Detail

MC74ACT74: Features: • Outputs Source/Sink 24 mA• 'ACT74 Has TTL Compatible InputsPinoutSpecifications Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) ...

MC74ACT74 Data Sheet

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Part Number:
MC74ACT74
Supply Ability:
5000

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  • 1~5000
  • Unit Price
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  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• Outputs Source/Sink 24 mA
• 'ACT74 Has TTL Compatible Inputs




Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
 DC Supply Voltage (Referenced to GND)
0.5 to +7.0
V
Vin
 DC Input Voltage (Referenced to GND)
0.5 to VCC +0.5
V
Vout
 DC Output Voltage (Referenced to GND)
0.5 to VCC +0.5
V
Iin
 DC Input Current, per Pin
±20
mA
Iout
 DC Output Sink/Source Current, per Pin
±50
mA
ICC
 DC VCC or GND Current per Output Pin
±50
mA
Tstg
 Storage Temperature
65 to +150
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation
   should be restricted to the Recommended Operating Conditions.


Description

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input of MC74ACT74 is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Asynchronous Inputs:
LOW input to S D (Set) sets Q to HIGH level
LOW input to C D (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C D and S D makes both Q and Q HIGH




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