MC74ACT573

Features:

• Inputs and Outputs on Opposite Sides of Package Allowing Easy Interface with Microprocessors
• Useful as Input or Output Port for Microprocessors
• Functionally Identical to MC74AC373/74ACT373
• 3−State Outputs for Bus Interfacing
• Outputs Source/Sink 24 mA
• ACT573 Has TTL Compatible Inputs
• Pb−Free Packages are Available*


Pinout

PIN	FUNCTION
D0D7	Data Inputs
LE	Latch Enable Input
OE	3−State Output Enable Input
Q0Q7	3−State Latch Outputs

Specifications

Symbol	Parameter	Value	Unit
VCC	DC Supply Voltage (Referenced to GND)	0.5 to +7.0	v
VIN	DC Input Voltage (Referenced to GND)	0.5 to VCC +0.5	v
VOUT	DC Output Voltage (Referenced to GND)	0.5 to VCC +0.5	v
IIN	DC Input Current, per Pin	±20	mA
IOUT	DC Output Sink/Source Current, per Pin	±50	mA
ICC	DC VCC or GND Current per Output Pin	±50	mA
Tstg	Storage Temperature	65 to +150	°C

Description

The MC74AC573/74ACT574 contains eight D−type latches with 3−state output buffers. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches.In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE MC74ACT573 is LOW the latches store the information that was present on the D inputs a setup time preceding the information of MC74ACT573 that was present on the D inputs a setup time preceding the HIGH−to−LOW transition of LE. The 3−state buffers are controlled by the Output Enable (OE) input. When OE is LOW, the buffers are enabled. When OE is HIGH the buffers are in the high impedance mode but this does not interfere with entering new data into the latches.