MC74ACT160

Features: • Synchronous Counting and Loading• High-Speed Synchronous Expansion• Typical Count Rate of 120 MHz• Outputs Source/Sink 24 mA• 'ACT160 and 'ACT162 Have TTL Compatible InputsPinoutSpecifications Symbol Parameter Value Unit VCC DC Supply...

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MC74ACT160 Picture
SeekIC No. : 004416713 Detail

MC74ACT160: Features: • Synchronous Counting and Loading• High-Speed Synchronous Expansion• Typical Count Rate of 120 MHz• Outputs Source/Sink 24 mA• 'ACT160 and 'ACT162 Have TTL C...

floor Price/Ceiling Price

Part Number:
MC74ACT160
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• Synchronous Counting and Loading
• High-Speed Synchronous Expansion
• Typical Count Rate of 120 MHz
• Outputs Source/Sink 24 mA
• 'ACT160 and 'ACT162 Have TTL Compatible Inputs



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
0.5 to VCC +0.5
V
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
65 to +150
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation
   should  be restricted to the Recommended Operating Conditions.



Description

The MC74AC160/74ACT160 and MC74AC162/74ACT162 are high-speed synchronous decade counters operating in the BCD (8421) sequence. They are synchronously presettable for application in programmable dividers and have
two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters. The MC74AC160/74ACT160 has an asynchronous Master Reset input that overrides all other inputs and forces the outputs LOW. The MC74AC162/74ACT162 has a Synchronous Reset input that overrides counting and parallel loading and allows all outputs to be simultaneously reset on the rising edge of the clock.




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