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MC68HC908JW32

Features: • High-performance M68HC08 architecture• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families• 8-MHz internal bus frequency• 88-kHz internal RC clock for timebase wakeup• 32-Kbytes of on-chip FLASH memory with security(1)• 1-Kb...

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SeekIC No. : 004416528 Detail

MC68HC908JW32: Features: • High-performance M68HC08 architecture• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families• 8-MHz internal bus frequency• 88-kHz interna...

MC68HC908JW32 Data Sheet

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Part Number:
MC68HC908JW32
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• High-performance M68HC08 architecture
• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families
• 8-MHz internal bus frequency
• 88-kHz internal RC clock for timebase wakeup
• 32-Kbytes of on-chip FLASH memory with security(1)
• 1-Kbytes of on-chip random-access memory (RAM)
• On-chip programming firmware for use with host PC computer
• Clock generation module (CGM)
• Up to 29 general-purpose 5V input/output (I/O) pins, including:
Keyboard interrupts on 8 pins
Direct drive for normal LED on 3 pins
High current drive for PS/2 connection on 2 pins (with USB module disabled)
• Serial peripheral interface module (SPI)
• PS2 clock generator module
• 16-bit, 2-channel timer interface module (TIM) with selectable rising and falling edges input
capture, output compare, PWM capability on each channel, and external clock input option
• Full universal serial bus (USB) specification 2.0 full-speed functions:
12 Mbps data rate
On-chip 3.3V regulator
Endpoint 0 with 8-byte transmit buffer and 8-byte receive buffer
64 bytes endpoint buffer to share among endpoints 14
• System protection features:
Optional computer operating properly (COP) reset
Optional low-voltage detection with reset
Illegal opcode detection with reset
Illegal address detection with reset
• Low-power design (fully static with stop and wait modes)
• Master reset pin with internal pull-up and power-on reset
• External asynchronous interrupt pin with internal pull-up (IRQ)
• 48-pin quad flat non-leaded package (QFN)




Pinout






Specifications

Characteristic Symbol Value Unit
Supply voltage VDD 0.3 to +6.0 V
Input voltage
All pins (except IRQ)
IRQ pin		 VIN VSS0.3 to VDD +0.3
VSS0.3 to 8.5		 V
Maximum current per pin excluding
VDD and VSS		 I ±25 mA
Maximum current out of VSS IMVSS 100 mA
Maximum current into VDD IMVDD 100 mA
Storage temperature TSTG 55 to +150 °C





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