MC68HC908GR60A Selling Leads, Price trend, MC68HC908GR60A DataSheet download, circuit diagram from SeekIC.com

Features: • High-performance M68HC08 architecture optimized for C-compilers• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families• 8-MHz internal bus frequency• Clock generation module supporting 1-MHz to 8-MHz crystals• FLASH program memory s...

See larger image

SeekIC No. : 004416511 Detail

MC68HC908GR60A: Features: • High-performance M68HC08 architecture optimized for C-compilers• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families• 8-MHz internal bus frequ...

MC68HC908GR60A Data Sheet

Get Latest Price

Part Number:: MC68HC908GR60A
Supply Ability:: 5000

Price Break

Qty
1~5000

Unit Price
Negotiable

Processing time
15 Days

SeekIC Buyer Protection PLUS - newly updated for 2013!

Escrow Protection.
Guaranteed refunds.
Secure payments.
Learn more >>

Month Sales

268 Transactions

Rating

evaluate (4.8 stars)

Upload time: 2024/11/27

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.

Product Details

Description

Features:

• High-performance M68HC08 architecture optimized for C-compilers
• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families
• 8-MHz internal bus frequency
• Clock generation module supporting 1-MHz to 8-MHz crystals
• FLASH program memory security⁽¹⁾• On-chip programming firmware for use with host personal computer which does not require high voltage for entry
• In-system programming (ISP)
• System protection features:
Optional computer operating properly (COP) reset
Low-voltage detection with optional reset and selectable trip points for 3.3-V and 5.0-V operation
Illegal opcode detection with reset
Illegal address detection with reset
• Low-power design; fully static with stop and wait modes
• Standard low-power modes of operation:
Wait mode
Stop mode
• Master reset pin and power-on reset (POR)
• On-chip FLASH memory:
MC68HC908GR60A - 60 Kbytes
MC68HC908GR48A - 48 Kbytes
MC68HC908GR32A - 32 Kbytes
• Random-access memory (RAM):
MC68HC908GR60A - 2048 bytes
MC68HC908GR48A - 1536 bytes
MC68HC908GR32A - 1536 bytes
• Serial peripheral interface (SPI) module
• Enhanced serial communications interface (ESCI) module
• One 16-bit, 2-channel timer interface module (TIM1) with selectable input capture, output compare,and pulse-width modulation (PWM) capability on each channel
• One 16-bit, 6-channel timer interface module (TIM2) with selectable input capture, output compare,and pulse-width modulation (PWM) capability on each channel
• Timebase module with clock prescaler circuitry for eight user selectable periodic real-time interrupts with optional active clock source during stop mode for periodic wakeup from stop using an external crystal
• 24-channel, 10-bit successive approximation analog-to-digital converter (ADC)
• 8-bit keyboard wakeup port with software selectable rising or falling edge detect, as well as high or low level detection
• Up to 53 general-purpose input/output (I/O) pins, including:
40 shared-function I/O pins, depending on package choice
Up to 13 dedicated I/O pins, depending on package choice
• Selectable pullups on inputs only on ports A, C, and D. Selection is on an individual port bit basis.During output mode, pullups are disengaged.
• Internal pullups on IRQ andRST to reduce customer system cost
• High current 10-mA sink/source capability on all port pins
• Higher current 20-mA sink/source capability on PTC0PTC4 and PTF0PTF3
• User selectable clockout feature with divide by 1, 2, and 4 of the bus or crystal frequency
• User selection of having the oscillator enabled or disabled during stop mode
• BREAK module (BRK) to allow single breakpoint setting during in-circuit debugging
• Available packages:
32-pin low-profile quad flat pack (LQFP)
48-pin low-profile quad flat pack (LQFP)
64-pin quad flat pack (QFP)
• Specific features in 32-pin LQFP are:
Port A is only 4 bits: PTA0PTA3; shared with ADC and KBI modules
Port B is only 6 bits: PTB0PTB5; shared with ADC module
Port C is only 2 bits: PTC0PTC1
Port D is only 7 bits: PTD0PTD6; shared with SPI, TIM1 and TIM2 modules
Port E is only 2 bits: PTE0PTE1; shared with ESCI module
• Specific features in 48-pin LQFP are:
Port A is 8 bits: PTA0PTA7; shared with ADC and KBI modules
Port B is 8 bits: PTB0PTB7; shared with ADC module
Port C is only 7 bits: PTC0PTC6
Port D is 8 bits: PTD0PTD7; shared with SPI, TIM1, and TIM2 modules
Port E is only 6 bits: PTE0PTE5; shared with ESCI module
• Specific features in 64-pin QFP are:
Port A is 8 bits: PTA0PTA7; shared with ADC and KBI modules
Port B is 8 bits: PTB0PTB7; shared with ADC module
Port C is only 7 bits: PTC0PTC6
Port D is 8 bits: PTD0PTD7; shared with SPI, TIM1, andTIM2 modules
Port E is only 6 bits: PTE0PTE5; shared with ESCI module
Port F is 8 bits: PTF0PTF7; shared with TIM2 module
Port G is 8 bits; PTG0PTG7; shared with ADC module

Pinout

Connection Diagram

Specifications

Characteristic⁽¹⁾	Symbol	Value	Unit
Supply Voltage	V_DD	0.3 to +6.0	V
Input Voltage	V_IN	V_SS0.3 to V_DD+0.3	V
Maximum current per pin excluding those specified below	I	± 15	mA
Maximum current for pins PTC0PTC4	L_PTCO-PTC4	±25	mA
Maximum current into V_DD	I_mvdd	150	mA
Maximum current out of V_SS	I_mvss	150	mA
Storage temperature	T_stg	55 to +150	°C

MC68HC908GR60A

product image

floor Price/Ceiling Price

Price Break

Month Sales

Rating

Payment Methods

Recent History

Description

Customers Who Bought This Item Also Bought

Resistors(1299)

Power Supplies - Board Mount(3035)

Static Control, ESD, Clean Room Products(496)

Isolators(194)

LED Products(5882)

Kits(573)