Features: • Fully static chip design featuring the industry standard M68HC05 core• Multi-master I2C-bus† communication port• 8176 bytes of user ROM (MC68HC05L28); 8128 bytes of user EPROM (MC68HC705L28)• 240 bytes of EEPROM• 240 bytes of bootstrap ROM• 256...
MC68HC705L28: Features: • Fully static chip design featuring the industry standard M68HC05 core• Multi-master I2C-bus† communication port• 8176 bytes of user ROM (MC68HC05L28); 8128 bytes ...
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Rating |
Symbol |
Value |
Unit |
Supply voltage(1) |
VDD |
0.3 to +7.0 |
V |
Input voltage: Normal operations Bootloader mode (IRQ0 pin only) |
VIN |
VSS 0.3 to VDD+ 0.3 VSS 0.3 to 2xVDD+ 0.3 |
V |
Current sink into port B |
IB |
80 |
mA |
Operating temperature range MC68HC05L28 (standard) |
TA |
TL to TH -40 to +85 |
°C |
Storage temperature range |
TSTG |
65 to +150 |
°C |
Current drain per pin(2) excluding VDD and VSS |
ID |
25 |
mA |
(1) All voltages are with respect to VSS.
(2) Maximum current drain per pin is for one pin at a time, limited by an external resistor.
Note: This device contains circuitry designed to protect against damage due to high electrostatic voltages or electric fields. However, it is recommended that normal precautions be taken to avoid the application of any voltages higher than those given in the maximum ratings table to this high impedance circuit. For maximum reliability all unused inputs should be tied to either VSS or VDD.
The MC68HC05L28 has two modes of operation available to the user single chip and RAM bootloader. The MC68HC705L28 also has two modes of operation single chip and EPROM/RAM bootloader. Table 2-1 and Table 2-2 show the conditions required to enter each mode on the rising edge of RESET.