MC68HC08AZ60

• High-Performance M68HC08 Architecture
• Fully Upward-Compatible Object Code with M6805, M146805,and M68HC05 Families
• 8.4 MHz Internal Bus Frequency
• 60 Kbytes of Read-Only Memory (ROM)
• 1 Kbyte of On-Chip Electrically Erasable Programmable ead-Only Memory with Security Option (EEPROM)
• 2 Kbyte of On-Chip RAM
• Clock Generator Module (CGM)
• Serial Peripheral Interface Module (SPI)
• Serial Communications Interface Module (SCI)
• 8-Bit, 15-Channel Analog-to-Digital Converter (ADC-15)
• 16-Bit, 6-Channel Timer Interface Module (TIMA-6)
• Periodic Interrupt Timer (TIM)
• System Protection Features
Computer Operating Properly (COP) with Optional Reset
Low-Voltage Detection with Optional Reset
Illegal Opcode Detection with Optional Reset
Illegal Address Detection with Optional Reset
• Low-Power Design (Fully Static with Stop and Wait Modes)
• Master Reset Pin and Power-On Reset

V_DD and V_SS are the power supply and ground pins. The MCU MC68HC08AZ60 operates rom a single power supply.

Fast signal transitions of MC68HC08AZ60on MCU pins place high, short-duration current emands on the power supply. To prevent noise problems of MC68HC08AZ60, take special are to provide  ower supply bypassing at the MCU as shown in Figure . Place the C1 bypass capacitor as close to the MCU as possible. Use high-frequency response  eramic capacitor for C1. C2 is an optional ulk current bypass capacitor for use in applications that require the port ins to source high current levels.