Features: Features of the MC68HC08AS32A include:• High-performance M68HC08 architecture• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families• 8.4-MHz internal bus frequency• 32,256 bytes of read-only memory (ROM)• ROM data security• 512...
MC68HC08AS32A: Features: Features of the MC68HC08AS32A include:• High-performance M68HC08 architecture• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families• 8.4-MHz inte...
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Please deliver the application program to Motorola in one of these:
• Macintosh®(1) 3 1/2-inch diskette (double-sided 800 K or double-sided high-density 1.4 M)
• MS-DOS®(2) or PC-DOSTM(3) 3 1/2-inch diskette (double-sided 720 K or double-sided high-density 1.44 M)
• MS-DOS® or PC-DOSTM 5 1/4-inch diskette (double-sided double-density 360 K or double-sided high-density 1.2 M)
Use positive logic for data and addresses.When submitting the application program on a diskette, clearly label the
diskette with this information:
• Customer name
• Customer part number
• Project or product name
• File name of object code
• Date
• Name of operating system that formatted diskette
• Formatted capacity of diskette
Maximum ratings are the extreme limits to which the MCU can be exposed without permanently damaging it.
The MCU contains circuitry to protect the inputs against damage from high static voltages; however, do not apply voltages higher than those shown in the table below. Keep VIN and VOUT within the range VSS (VIN or VOUT) VDD. Connect unused inputs to the appropriate voltage level, either VSS or VDD.
Rating |
Symbol |
Value |
Unit |
Supply voltage |
VDD |
0.3 to +6.0 |
V |
Input voltage |
VIn |
VSS 0.3 to VDD +0.3 |
V |
Maximum current per pin excluding VDD and VSS |
I |
±25 |
mA |
Storage temperature |
TSTG |
55 to +150 |
°C |
Maximum current out of VSS |
IMVSS |
100 |
mA |
Maximum current into VDD |
IMVDD |
100 |
mA |
Reset IRQ input voltage |
VHI |
VDD to VDD + 2 |
°C |
Operating temperature range |
TA |
-40to125 |
°C |
Operating voltage range |
VDD |
5.0 ± 10% |
V |
Thermal resistance PLCC (52 pins) QFP (64 pins) |
JA |
50 70 |
°C/W |
I/O pin power dissipation |
PI/O |
User determined |
W |
Power dissipation(1) |
PD |
PD = (IDD x VDD) + PI/O = K/(TJ + 273°C) |
W |
Constant(2) |
K |
PD x (TA + 273°C) + (PD 2 x JA) |
W/°C |
Average junction temperature |
TJ |
TA = PD * JA |
°C |
Maximum junction temperature |
TJM |
150 |
°C |