Features: • MC68040 Integer Performance-26.1 MIPS at 25 MHz and 34.8 MIPS at 33 MHz• Independent Instruction and Data MMUs• Dual 4-Kbyte On-chip Caches- Separate Data and Instruction Cache- Simultaneous Access• Bus Snooping- Multi-Master and Multi-Processor Support- MC68LC0...
MC68040V: Features: • MC68040 Integer Performance-26.1 MIPS at 25 MHz and 34.8 MIPS at 33 MHz• Independent Instruction and Data MMUs• Dual 4-Kbyte On-chip Caches- Separate Data and Instructi...
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The MC68040V is a high-performance, 32-bit, 3.3-V, static microprocessor that provides a low-power mode of operation. The MC68040V is MC68LC040 compatible, featuring dual on-chip caches, fully independent instruction and data demand-paged memory management units (MMUs), and a pipelined integer unit. A high degree of instruction execution parallelism of MC68040V is achieved through the use of a full internal Harvard architecture, multiple internal buses, and independent execution units. Accessed through the LPSTOP instruction, a lowpower mode of operation is provided that allows for full power-down capability. The operating current is further reduced by the use of a 3.3-V power supply. The 3.3-V power supply and the low-power mode reduce system power usage dramatically. The functionality provided by the MC68040V makes it the ideal choice for a range of high-performance, power-sensitive, general computing and embedded processing applications.
The high level of integration of MC68040V results in high performance while reducing overall system power consumption for the MC68040V. Complete code compatibility with the MC68000 family allows the designer to utilize existing code and past experience to bring products to market quickly. Additionally, a broad base of established development tools, including real-time kernels, operating systems, languages, and applications, assist in product development. Figure 1 shows a simplified block diagram of the MC68040V.