Features: • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 mA• High Noise Immunity Characteristic of CMOS Devices• In Compliance with the Requirements Defi...
MC54HC74A: Features: • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 mA•...
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PinoutDescriptionThe F373 contains eight D-type latches with 3-state output buffers. When the Latc...
PinoutDescriptionThe F374 consists of eight edge-triggered flip-flops with individual D-type input...
Symbol | Parameter | Value | Unit |
vcc | DC Supply Voltage (Referenced to GND) | 0.5 to +7.0 | V |
VIN | DC Input Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
VOUT | DC Output Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
LIN | DC Input Current, per Pin | ±20 | mA |
IOUT | DC Onput Current, per Pin | ±25 | mA |
ICC | DC Supply Current Per Supply Pin | ±50 | mA |
PD | Power dissipation in still air piastic DIP SOIC package |
750 500 |
mW |
TSTG | Storage Temperature | 65 to +150 | °C |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 | °C |
The MC54/74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
MC54HC74A consists of two D flipflops with individual Set, Reset, and Clock inputs. Information at a Dinput is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs of MC54HC74A are available from each flipflop. The Set and Reset inputs are asynchronous.