MC54HC646

Features: • Output Drive Capability: 15 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 mA• High Noise Immunity Characteristic of CMOS Devices• In Compliance with the Requirements Defined by...

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SeekIC No. : 004416238 Detail

MC54HC646: Features: • Output Drive Capability: 15 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 mA• High...

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Part Number:
MC54HC646
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
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Upload time: 2024/11/27

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Product Details

Description



Features:

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 780 FETs or 195 Equivalent Gates



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
vcc DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
VOUT DC Output Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
LIN DC Input Current, per Pin ±20 mA
IOUT DC Onput Current, per Pin ±35 mA
ICC DC Supply Current Per Supply Pin ±75 mA
PD Power dissipation in still air piastic DIP
SOIC package
750
500
mW
TSTG Storage Temperature 65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260 °C
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/C from 65 to 125C
Ceramic DIP: 10 mW/C from 100 to 125C
SOIC Package: 7 mW/C from 65 to 125C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).



Description

The MC54/74HC646 is identical in pinout to the LS646. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

MC54HC646 are bus transceivers with D flipflops. Depending on the status of the DataSource Selection pins, data may be routed to the outputs either from the flipflops or transmitted realtime from the inputs (see Function Table and Application Information).

The Output Enable of MC54HC646 and the Direction pins control the transceiver's function. Bus A and Bus B cannot be routed as outputs to each other simultaneously, but can be routed as inputs to the A and B flipflops. Also, the A and B flipflops can be routed as outputs to Bus A and Bus B. Additionally, when either or both of MC54HC646 are in the highimpedance
state, these I/O pins may be used as inputs to the D flipflops for data storage.

The user  of MC54HC646 should note that because the clocks are not gated with the Direction and Output Enable pins, data at the A and B ports may be clocked into the storage flipflops at any time.




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